| /arm-trusted-firmware/plat/mediatek/mt8195/drivers/spm/ |
| H A D | mt_spm_cond.c | 81 uintptr_t addr; member
86 #define IDLE_CG(mask, addr, bitflip, clkmux) \ argument
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| /arm-trusted-firmware/plat/brcm/board/stingray/src/ |
| H A D | tz_sec.c | 46 uintptr_t addr; member
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| H A D | sr_paxb_phy.c | 35 #define PMI_ADDR_BCAST(addr) ((0x1 << 27) | (0x1ff << 16) | (addr)) argument
36 #define PMI_ADDR_LANE0(addr) ((0x1 << 27) | (addr)) argument
37 #define PMI_ADDR_LANE1(addr) ((0x1 << 27) | (0x1 << 16) | (addr)) argument
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| /arm-trusted-firmware/plat/amlogic/gxbb/ |
| H A D | gxbb_pm.c | 134 uintptr_t addr = AML_PSCI_MAILBOX_BASE + 8 + (core << 4); in gxbb_pwr_domain_off() local
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| /arm-trusted-firmware/include/drivers/marvell/ |
| H A D | cache_llc.h | 44 #define LLC_BLK_ALOC_BASE_ADDR(addr) ((addr) & ~(LLC_WAY_SIZE - 1)) argument
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| /arm-trusted-firmware/plat/mediatek/mt8195/drivers/emi_mpu/ |
| H A D | emi_mpu.c | 155 static inline uint64_t get_decoded_phys_addr(uint64_t addr) in get_decoded_phys_addr() argument
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| /arm-trusted-firmware/drivers/arm/tzc/ |
| H A D | tzc380.c | 65 static uint32_t addr_low(uintptr_t addr) in addr_low() argument
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| /arm-trusted-firmware/plat/rockchip/rk3288/drivers/soc/ |
| H A D | soc.c | 90 void regs_update_bits(uintptr_t addr, uint32_t val, in regs_update_bits() argument
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| /arm-trusted-firmware/plat/mediatek/mt8186/drivers/dfd/ |
| H A D | plat_dfd.h | 14 #define sync_writel(addr, val) do { mmio_write_32((addr), (val)); \ argument
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| /arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/ |
| H A D | soc.h | 131 #define regs_updata_bit_set(addr, shift) \ argument
133 #define regs_updata_bit_clr(addr, shift) \ argument
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| /arm-trusted-firmware/plat/st/common/ |
| H A D | stm32cubeprogrammer_uart.c | 58 uint8_t *addr; member
78 static int uart_write(const uint8_t *addr, uint16_t size) in uart_write() argument
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| /arm-trusted-firmware/plat/marvell/armada/common/ |
| H A D | mrvl_sip_svc.c | 60 _Bool is_cp_range_valid(u_register_t *addr) in is_cp_range_valid() argument
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| /arm-trusted-firmware/plat/xilinx/versal/ |
| H A D | bl31_versal_setup.c | 73 uint64_t addr[HANDOFF_PARAMS_MAX_SIZE]; in bl31_early_platform_setup2() local
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| /arm-trusted-firmware/drivers/marvell/ |
| H A D | cache_llc.c | 160 uintptr_t addr, end_addr; in llc_sram_test() local
[all...] |
| H A D | mci.c | 243 #define MCI_PHY_CTRL_PHY_ADDR_MSB(addr) \ argument
268 static void mci_mmio_write_32(uintptr_t addr, uint32_t value) in mci_mmio_write_32() argument
276 static uint32_t mci_mmio_read_32(uintptr_t addr) in mci_mmio_read_32() argument
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| /arm-trusted-firmware/drivers/renesas/rzg/qos/ |
| H A D | qos_common.h | 90 uintptr_t addr; member
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| /arm-trusted-firmware/plat/mediatek/drivers/spm/mt8188/ |
| H A D | mt_spm_cond.c | 85 uintptr_t addr; member
92 #define IDLE_CG(mask, addr, bitflip, clkmux) {mask, (uintptr_t)addr, bitflip, clkmux} argument
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| H A D | mt_spm_pmic_wrap.c | 47 struct pmic_wrap_cmd addr[NR_PMIC_WRAP_CMD]; member
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| /arm-trusted-firmware/plat/mediatek/mt8192/drivers/dfd/ |
| H A D | plat_dfd.h | 14 #define sync_writel(addr, val) do { mmio_write_32((addr), (val)); \ argument
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| /arm-trusted-firmware/include/plat/arm/common/ |
| H A D | fconf_ethosn_getter.h | 42 uint64_t addr; member
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| /arm-trusted-firmware/plat/hisilicon/hikey/ |
| H A D | hisi_dvfs.c | 84 static inline void write_reg_mask(uintptr_t addr, in write_reg_mask() argument
94 static inline uint32_t read_reg_mask(uintptr_t addr, in read_reg_mask() argument
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| /arm-trusted-firmware/plat/ax/laguna/ |
| H A D | lua_pm.c | 170 uint64_t addr = CPU_SYSCTL_BASE + CA55_CORE_SW_RST_OFFSET; in lua_pwr_domain_on() local
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| /arm-trusted-firmware/lib/xlat_mpu/ |
| H A D | xlat_mpu_core.c | 28 void xlat_clean_dcache_range(uintptr_t addr, size_t size) in xlat_clean_dcache_range() argument
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| /arm-trusted-firmware/plat/nxp/common/setup/include/ |
| H A D | plat_common.h | 110 uint64_t addr; member
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| /arm-trusted-firmware/drivers/st/clk/ |
| H A D | clk-stm32-core.c | 194 uintptr_t addr = priv->base + gate->offset; in _clk_stm32_gate_disable() local
206 uintptr_t addr = priv->base + gate->offset; in _clk_stm32_gate_enable() local
827 uintptr_t addr = priv->base + gate->offset; in clk_stm32_gate_enable() local
844 uintptr_t addr in clk_stm32_gate_disable() local
856 uint32_t addr; _clk_stm32_gate_is_enabled() local
[all...] |