1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (C) 2018-2020 Marvell International Ltd. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * https://spdx.org/licenses 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu /* LLC driver is the Last Level Cache (L3C) driver 9*91f16700Schasinglulu * for Marvell SoCs in AP806, AP807, and AP810 10*91f16700Schasinglulu */ 11*91f16700Schasinglulu 12*91f16700Schasinglulu #ifndef CACHE_LLC_H 13*91f16700Schasinglulu #define CACHE_LLC_H 14*91f16700Schasinglulu 15*91f16700Schasinglulu #define LLC_CTRL(ap) (MVEBU_LLC_BASE(ap) + 0x100) 16*91f16700Schasinglulu #define LLC_SECURE_CTRL(ap) (MVEBU_LLC_BASE(ap) + 0x10C) 17*91f16700Schasinglulu #define LLC_SYNC(ap) (MVEBU_LLC_BASE(ap) + 0x700) 18*91f16700Schasinglulu #define LLC_BANKED_MNT_AHR(ap) (MVEBU_LLC_BASE(ap) + 0x724) 19*91f16700Schasinglulu #define LLC_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x77C) 20*91f16700Schasinglulu #define LLC_BLK_ALOC(ap) (MVEBU_LLC_BASE(ap) + 0x78c) 21*91f16700Schasinglulu #define LLC_CLEAN_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7BC) 22*91f16700Schasinglulu #define LLC_CLEAN_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7FC) 23*91f16700Schasinglulu #define LLC_TCN_LOCK(ap, tc) (MVEBU_LLC_BASE(ap) + 0x920 + 4 * (tc)) 24*91f16700Schasinglulu 25*91f16700Schasinglulu #define MASTER_LLC_CTRL LLC_CTRL(MVEBU_AP0) 26*91f16700Schasinglulu #define MASTER_LLC_INV_WAY LLC_INV_WAY(MVEBU_AP0) 27*91f16700Schasinglulu #define MASTER_LLC_TC0_LOCK LLC_TCN_LOCK(MVEBU_AP0, 0) 28*91f16700Schasinglulu 29*91f16700Schasinglulu #define LLC_CTRL_EN 1 30*91f16700Schasinglulu #define LLC_EXCLUSIVE_EN 0x100 31*91f16700Schasinglulu #define LLC_ALL_WAYS_MASK 0xFFFFFFFF 32*91f16700Schasinglulu 33*91f16700Schasinglulu /* AP806/AP807 - 1MB 8-ways LLC */ 34*91f16700Schasinglulu #define LLC_WAYS 8 35*91f16700Schasinglulu #define LLC_WAY_MASK ((1 << LLC_WAYS) - 1) 36*91f16700Schasinglulu #define LLC_SIZE (1024 * 1024) 37*91f16700Schasinglulu #define LLC_WAY_SIZE (LLC_SIZE / LLC_WAYS) 38*91f16700Schasinglulu #define LLC_TC_NUM 15 39*91f16700Schasinglulu 40*91f16700Schasinglulu #define LLC_BLK_ALOC_WAY_ID(way) ((way) & 0x1f) 41*91f16700Schasinglulu #define LLC_BLK_ALOC_WAY_DATA_DSBL (0x0 << 6) 42*91f16700Schasinglulu #define LLC_BLK_ALOC_WAY_DATA_CLR (0x1 << 6) 43*91f16700Schasinglulu #define LLC_BLK_ALOC_WAY_DATA_SET (0x3 << 6) 44*91f16700Schasinglulu #define LLC_BLK_ALOC_BASE_ADDR(addr) ((addr) & ~(LLC_WAY_SIZE - 1)) 45*91f16700Schasinglulu 46*91f16700Schasinglulu #ifndef __ASSEMBLER__ 47*91f16700Schasinglulu void llc_cache_sync(int ap_index); 48*91f16700Schasinglulu void llc_flush_all(int ap_index); 49*91f16700Schasinglulu void llc_clean_all(int ap_index); 50*91f16700Schasinglulu void llc_inv_all(int ap_index); 51*91f16700Schasinglulu void llc_disable(int ap_index); 52*91f16700Schasinglulu void llc_enable(int ap_index, int excl_mode); 53*91f16700Schasinglulu int llc_is_exclusive(int ap_index); 54*91f16700Schasinglulu void llc_runtime_enable(int ap_index); 55*91f16700Schasinglulu #if LLC_SRAM 56*91f16700Schasinglulu int llc_sram_enable(int ap_index, int size); 57*91f16700Schasinglulu void llc_sram_disable(int ap_index); 58*91f16700Schasinglulu int llc_sram_test(int ap_index, int size, char *msg); 59*91f16700Schasinglulu #endif /* LLC_SRAM */ 60*91f16700Schasinglulu #endif /* __ASSEMBLER__ */ 61*91f16700Schasinglulu 62*91f16700Schasinglulu #endif /* CACHE_LLC_H */ 63