| /arm-trusted-firmware/plat/mediatek/mt8192/drivers/spm/ |
| H A D | mt_spm_internal.h | 112 struct pwr_ctrl { struct
311 /* code gen by spm_pwr_ctrl_atf.pl, need struct pwr_ctrl */ argument
113 pcm_flagspwr_ctrl global() argument
114 pcm_flags_custpwr_ctrl global() argument
115 pcm_flags_cust_setpwr_ctrl global() argument
116 pcm_flags_cust_clrpwr_ctrl global() argument
117 pcm_flags1pwr_ctrl global() argument
118 pcm_flags1_custpwr_ctrl global() argument
119 pcm_flags1_cust_setpwr_ctrl global() argument
120 pcm_flags1_cust_clrpwr_ctrl global() argument
121 timer_valpwr_ctrl global() argument
122 timer_val_custpwr_ctrl global() argument
123 timer_val_ramp_enpwr_ctrl global() argument
124 timer_val_ramp_en_secpwr_ctrl global() argument
125 wake_srcpwr_ctrl global() argument
126 wake_src_custpwr_ctrl global() argument
127 wakelock_timer_valpwr_ctrl global() argument
128 wdt_disablepwr_ctrl global() argument
133 reg_srcclken0_ctlpwr_ctrl global() argument
134 reg_srcclken1_ctlpwr_ctrl global() argument
135 reg_spm_lock_infra_dcmpwr_ctrl global() argument
136 reg_srcclken_maskpwr_ctrl global() argument
137 reg_md1_c32rm_enpwr_ctrl global() argument
138 reg_md2_c32rm_enpwr_ctrl global() argument
139 reg_clksq0_sel_ctrlpwr_ctrl global() argument
140 reg_clksq1_sel_ctrlpwr_ctrl global() argument
141 reg_srcclken0_enpwr_ctrl global() argument
142 reg_srcclken1_enpwr_ctrl global() argument
143 reg_sysclk0_src_mask_bpwr_ctrl global() argument
144 reg_sysclk1_src_mask_bpwr_ctrl global() argument
147 reg_wfi_oppwr_ctrl global() argument
148 reg_wfi_typepwr_ctrl global() argument
149 reg_mp0_cputop_idle_maskpwr_ctrl global() argument
150 reg_mp1_cputop_idle_maskpwr_ctrl global() argument
151 reg_mcusys_idle_maskpwr_ctrl global() argument
152 reg_md_apsrc_1_selpwr_ctrl global() argument
153 reg_md_apsrc_0_selpwr_ctrl global() argument
154 reg_conn_apsrc_selpwr_ctrl global() argument
157 reg_dpmaif_srcclkena_mask_bpwr_ctrl global() argument
158 reg_dpmaif_infra_req_mask_bpwr_ctrl global() argument
159 reg_dpmaif_apsrc_req_mask_bpwr_ctrl global() argument
160 reg_dpmaif_vrf18_req_mask_bpwr_ctrl global() argument
161 reg_dpmaif_ddr_en_mask_bpwr_ctrl global() argument
163 reg_spm_apsrc_reqpwr_ctrl global() argument
164 reg_spm_f26m_reqpwr_ctrl global() argument
165 reg_spm_infra_reqpwr_ctrl global() argument
166 reg_spm_vrf18_reqpwr_ctrl global() argument
167 reg_spm_ddr_en_reqpwr_ctrl global() argument
168 reg_spm_dvfs_reqpwr_ctrl global() argument
169 reg_spm_sw_mailbox_reqpwr_ctrl global() argument
170 reg_spm_sspm_mailbox_reqpwr_ctrl global() argument
171 reg_spm_adsp_mailbox_reqpwr_ctrl global() argument
172 reg_spm_scp_mailbox_reqpwr_ctrl global() argument
175 reg_md_srcclkena_0_mask_bpwr_ctrl global() argument
176 reg_md_srcclkena2infra_req_0_mask_bpwr_ctrl global() argument
177 reg_md_apsrc2infra_req_0_mask_bpwr_ctrl global() argument
178 reg_md_apsrc_req_0_mask_bpwr_ctrl global() argument
179 reg_md_vrf18_req_0_mask_bpwr_ctrl global() argument
180 reg_md_ddr_en_0_mask_bpwr_ctrl global() argument
181 reg_md_srcclkena_1_mask_bpwr_ctrl global() argument
182 reg_md_srcclkena2infra_req_1_mask_bpwr_ctrl global() argument
183 reg_md_apsrc2infra_req_1_mask_bpwr_ctrl global() argument
184 reg_md_apsrc_req_1_mask_bpwr_ctrl global() argument
185 reg_md_vrf18_req_1_mask_bpwr_ctrl global() argument
186 reg_md_ddr_en_1_mask_bpwr_ctrl global() argument
187 reg_conn_srcclkena_mask_bpwr_ctrl global() argument
188 reg_conn_srcclkenb_mask_bpwr_ctrl global() argument
189 reg_conn_infra_req_mask_bpwr_ctrl global() argument
190 reg_conn_apsrc_req_mask_bpwr_ctrl global() argument
191 reg_conn_vrf18_req_mask_bpwr_ctrl global() argument
192 reg_conn_ddr_en_mask_bpwr_ctrl global() argument
193 reg_conn_vfe28_mask_bpwr_ctrl global() argument
194 reg_srcclkeni0_srcclkena_mask_bpwr_ctrl global() argument
195 reg_srcclkeni0_infra_req_mask_bpwr_ctrl global() argument
196 reg_srcclkeni1_srcclkena_mask_bpwr_ctrl global() argument
197 reg_srcclkeni1_infra_req_mask_bpwr_ctrl global() argument
198 reg_srcclkeni2_srcclkena_mask_bpwr_ctrl global() argument
199 reg_srcclkeni2_infra_req_mask_bpwr_ctrl global() argument
200 reg_infrasys_apsrc_req_mask_bpwr_ctrl global() argument
201 reg_infrasys_ddr_en_mask_bpwr_ctrl global() argument
202 reg_md32_srcclkena_mask_bpwr_ctrl global() argument
203 reg_md32_infra_req_mask_bpwr_ctrl global() argument
204 reg_md32_apsrc_req_mask_bpwr_ctrl global() argument
205 reg_md32_vrf18_req_mask_bpwr_ctrl global() argument
206 reg_md32_ddr_en_mask_bpwr_ctrl global() argument
209 reg_scp_srcclkena_mask_bpwr_ctrl global() argument
210 reg_scp_infra_req_mask_bpwr_ctrl global() argument
211 reg_scp_apsrc_req_mask_bpwr_ctrl global() argument
212 reg_scp_vrf18_req_mask_bpwr_ctrl global() argument
213 reg_scp_ddr_en_mask_bpwr_ctrl global() argument
214 reg_audio_dsp_srcclkena_mask_bpwr_ctrl global() argument
215 reg_audio_dsp_infra_req_mask_bpwr_ctrl global() argument
216 reg_audio_dsp_apsrc_req_mask_bpwr_ctrl global() argument
217 reg_audio_dsp_vrf18_req_mask_bpwr_ctrl global() argument
218 reg_audio_dsp_ddr_en_mask_bpwr_ctrl global() argument
219 reg_ufs_srcclkena_mask_bpwr_ctrl global() argument
220 reg_ufs_infra_req_mask_bpwr_ctrl global() argument
221 reg_ufs_apsrc_req_mask_bpwr_ctrl global() argument
222 reg_ufs_vrf18_req_mask_bpwr_ctrl global() argument
223 reg_ufs_ddr_en_mask_bpwr_ctrl global() argument
224 reg_disp0_apsrc_req_mask_bpwr_ctrl global() argument
225 reg_disp0_ddr_en_mask_bpwr_ctrl global() argument
226 reg_disp1_apsrc_req_mask_bpwr_ctrl global() argument
227 reg_disp1_ddr_en_mask_bpwr_ctrl global() argument
228 reg_gce_infra_req_mask_bpwr_ctrl global() argument
229 reg_gce_apsrc_req_mask_bpwr_ctrl global() argument
230 reg_gce_vrf18_req_mask_bpwr_ctrl global() argument
231 reg_gce_ddr_en_mask_bpwr_ctrl global() argument
232 reg_apu_srcclkena_mask_bpwr_ctrl global() argument
233 reg_apu_infra_req_mask_bpwr_ctrl global() argument
234 reg_apu_apsrc_req_mask_bpwr_ctrl global() argument
235 reg_apu_vrf18_req_mask_bpwr_ctrl global() argument
236 reg_apu_ddr_en_mask_bpwr_ctrl global() argument
237 reg_cg_check_srcclkena_mask_bpwr_ctrl global() argument
238 reg_cg_check_apsrc_req_mask_bpwr_ctrl global() argument
239 reg_cg_check_vrf18_req_mask_bpwr_ctrl global() argument
240 reg_cg_check_ddr_en_mask_bpwr_ctrl global() argument
243 reg_dvfsrc_event_trigger_mask_bpwr_ctrl global() argument
244 reg_sw2spm_int0_mask_bpwr_ctrl global() argument
245 reg_sw2spm_int1_mask_bpwr_ctrl global() argument
246 reg_sw2spm_int2_mask_bpwr_ctrl global() argument
247 reg_sw2spm_int3_mask_bpwr_ctrl global() argument
248 reg_sc_adsp2spm_wakeup_mask_bpwr_ctrl global() argument
249 reg_sc_sspm2spm_wakeup_mask_bpwr_ctrl global() argument
250 reg_sc_scp2spm_wakeup_mask_bpwr_ctrl global() argument
251 reg_csyspwrreq_maskpwr_ctrl global() argument
252 reg_spm_srcclkena_reserved_mask_bpwr_ctrl global() argument
253 reg_spm_infra_req_reserved_mask_bpwr_ctrl global() argument
254 reg_spm_apsrc_req_reserved_mask_bpwr_ctrl global() argument
255 reg_spm_vrf18_req_reserved_mask_bpwr_ctrl global() argument
256 reg_spm_ddr_en_reserved_mask_bpwr_ctrl global() argument
257 reg_mcupm_srcclkena_mask_bpwr_ctrl global() argument
258 reg_mcupm_infra_req_mask_bpwr_ctrl global() argument
259 reg_mcupm_apsrc_req_mask_bpwr_ctrl global() argument
260 reg_mcupm_vrf18_req_mask_bpwr_ctrl global() argument
261 reg_mcupm_ddr_en_mask_bpwr_ctrl global() argument
262 reg_msdc0_srcclkena_mask_bpwr_ctrl global() argument
263 reg_msdc0_infra_req_mask_bpwr_ctrl global() argument
264 reg_msdc0_apsrc_req_mask_bpwr_ctrl global() argument
265 reg_msdc0_vrf18_req_mask_bpwr_ctrl global() argument
266 reg_msdc0_ddr_en_mask_bpwr_ctrl global() argument
267 reg_msdc1_srcclkena_mask_bpwr_ctrl global() argument
268 reg_msdc1_infra_req_mask_bpwr_ctrl global() argument
269 reg_msdc1_apsrc_req_mask_bpwr_ctrl global() argument
270 reg_msdc1_vrf18_req_mask_bpwr_ctrl global() argument
271 reg_msdc1_ddr_en_mask_bpwr_ctrl global() argument
274 ccif_event_mask_bpwr_ctrl global() argument
275 reg_bak_psri_srcclkena_mask_bpwr_ctrl global() argument
276 reg_bak_psri_infra_req_mask_bpwr_ctrl global() argument
277 reg_bak_psri_apsrc_req_mask_bpwr_ctrl global() argument
278 reg_bak_psri_vrf18_req_mask_bpwr_ctrl global() argument
279 reg_bak_psri_ddr_en_mask_bpwr_ctrl global() argument
280 reg_dramc0_md32_infra_req_mask_bpwr_ctrl global() argument
281 reg_dramc0_md32_vrf18_req_mask_bpwr_ctrl global() argument
282 reg_dramc1_md32_infra_req_mask_bpwr_ctrl global() argument
283 reg_dramc1_md32_vrf18_req_mask_bpwr_ctrl global() argument
284 reg_conn_srcclkenb2pwrap_mask_bpwr_ctrl global() argument
285 reg_dramc0_md32_wakeup_maskpwr_ctrl global() argument
286 reg_dramc1_md32_wakeup_maskpwr_ctrl global() argument
[all...] |
| /arm-trusted-firmware/plat/mediatek/mt8186/drivers/spm/ |
| H A D | mt_spm_internal.h | 105 struct pwr_ctrl { struct
288 /* code gen by spm_pwr_ctrl_atf.pl, need struct pwr_ctrl */ argument
106 pcm_flagspwr_ctrl global() argument
107 pcm_flags_custpwr_ctrl global() argument
108 pcm_flags_cust_setpwr_ctrl global() argument
109 pcm_flags_cust_clrpwr_ctrl global() argument
110 pcm_flags1pwr_ctrl global() argument
111 pcm_flags1_custpwr_ctrl global() argument
112 pcm_flags1_cust_setpwr_ctrl global() argument
113 pcm_flags1_cust_clrpwr_ctrl global() argument
114 timer_valpwr_ctrl global() argument
115 timer_val_custpwr_ctrl global() argument
116 timer_val_ramp_enpwr_ctrl global() argument
117 timer_val_ramp_en_secpwr_ctrl global() argument
118 wake_srcpwr_ctrl global() argument
119 wake_src_custpwr_ctrl global() argument
120 wakelock_timer_valpwr_ctrl global() argument
121 wdt_disablepwr_ctrl global() argument
126 reg_wfi_oppwr_ctrl global() argument
127 reg_wfi_typepwr_ctrl global() argument
128 reg_mp0_cputop_idle_maskpwr_ctrl global() argument
129 reg_mp1_cputop_idle_maskpwr_ctrl global() argument
130 reg_mcusys_idle_maskpwr_ctrl global() argument
131 reg_md_apsrc_1_selpwr_ctrl global() argument
132 reg_md_apsrc_0_selpwr_ctrl global() argument
133 reg_conn_apsrc_selpwr_ctrl global() argument
136 reg_ccif_event_infra_req_mask_bpwr_ctrl global() argument
137 reg_ccif_event_apsrc_req_mask_bpwr_ctrl global() argument
140 reg_spm_apsrc_reqpwr_ctrl global() argument
141 reg_spm_f26m_reqpwr_ctrl global() argument
142 reg_spm_infra_reqpwr_ctrl global() argument
143 reg_spm_vrf18_reqpwr_ctrl global() argument
144 reg_spm_ddren_reqpwr_ctrl global() argument
145 reg_spm_dvfs_reqpwr_ctrl global() argument
146 reg_spm_sw_mailbox_reqpwr_ctrl global() argument
147 reg_spm_sspm_mailbox_reqpwr_ctrl global() argument
148 reg_spm_adsp_mailbox_reqpwr_ctrl global() argument
149 reg_spm_scp_mailbox_reqpwr_ctrl global() argument
152 reg_md_0_srcclkena_mask_bpwr_ctrl global() argument
153 reg_md_0_infra_req_mask_bpwr_ctrl global() argument
154 reg_md_0_apsrc_req_mask_bpwr_ctrl global() argument
155 reg_md_0_vrf18_req_mask_bpwr_ctrl global() argument
156 reg_md_0_ddren_req_mask_bpwr_ctrl global() argument
157 reg_md_1_srcclkena_mask_bpwr_ctrl global() argument
158 reg_md_1_infra_req_mask_bpwr_ctrl global() argument
159 reg_md_1_apsrc_req_mask_bpwr_ctrl global() argument
160 reg_md_1_vrf18_req_mask_bpwr_ctrl global() argument
161 reg_md_1_ddren_req_mask_bpwr_ctrl global() argument
162 reg_conn_srcclkena_mask_bpwr_ctrl global() argument
163 reg_conn_srcclkenb_mask_bpwr_ctrl global() argument
164 reg_conn_infra_req_mask_bpwr_ctrl global() argument
165 reg_conn_apsrc_req_mask_bpwr_ctrl global() argument
166 reg_conn_vrf18_req_mask_bpwr_ctrl global() argument
167 reg_conn_ddren_req_mask_bpwr_ctrl global() argument
168 reg_conn_vfe28_mask_bpwr_ctrl global() argument
169 reg_srcclkeni_srcclkena_mask_bpwr_ctrl global() argument
170 reg_srcclkeni_infra_req_mask_bpwr_ctrl global() argument
171 reg_infrasys_apsrc_req_mask_bpwr_ctrl global() argument
172 reg_infrasys_ddren_req_mask_bpwr_ctrl global() argument
173 reg_sspm_srcclkena_mask_bpwr_ctrl global() argument
174 reg_sspm_infra_req_mask_bpwr_ctrl global() argument
175 reg_sspm_apsrc_req_mask_bpwr_ctrl global() argument
176 reg_sspm_vrf18_req_mask_bpwr_ctrl global() argument
177 reg_sspm_ddren_req_mask_bpwr_ctrl global() argument
180 reg_scp_srcclkena_mask_bpwr_ctrl global() argument
181 reg_scp_infra_req_mask_bpwr_ctrl global() argument
182 reg_scp_apsrc_req_mask_bpwr_ctrl global() argument
183 reg_scp_vrf18_req_mask_bpwr_ctrl global() argument
184 reg_scp_ddren_req_mask_bpwr_ctrl global() argument
185 reg_audio_dsp_srcclkena_mask_bpwr_ctrl global() argument
186 reg_audio_dsp_infra_req_mask_bpwr_ctrl global() argument
187 reg_audio_dsp_apsrc_req_mask_bpwr_ctrl global() argument
188 reg_audio_dsp_vrf18_req_mask_bpwr_ctrl global() argument
189 reg_audio_dsp_ddren_req_mask_bpwr_ctrl global() argument
190 reg_ufs_srcclkena_mask_bpwr_ctrl global() argument
191 reg_ufs_infra_req_mask_bpwr_ctrl global() argument
192 reg_ufs_apsrc_req_mask_bpwr_ctrl global() argument
193 reg_ufs_vrf18_req_mask_bpwr_ctrl global() argument
194 reg_ufs_ddren_req_mask_bpwr_ctrl global() argument
195 reg_disp0_apsrc_req_mask_bpwr_ctrl global() argument
196 reg_disp0_ddren_req_mask_bpwr_ctrl global() argument
197 reg_disp1_apsrc_req_mask_bpwr_ctrl global() argument
198 reg_disp1_ddren_req_mask_bpwr_ctrl global() argument
199 reg_gce_infra_req_mask_bpwr_ctrl global() argument
200 reg_gce_apsrc_req_mask_bpwr_ctrl global() argument
201 reg_gce_vrf18_req_mask_bpwr_ctrl global() argument
202 reg_gce_ddren_req_mask_bpwr_ctrl global() argument
203 reg_apu_srcclkena_mask_bpwr_ctrl global() argument
204 reg_apu_infra_req_mask_bpwr_ctrl global() argument
205 reg_apu_apsrc_req_mask_bpwr_ctrl global() argument
206 reg_apu_vrf18_req_mask_bpwr_ctrl global() argument
207 reg_apu_ddren_req_mask_bpwr_ctrl global() argument
208 reg_cg_check_srcclkena_mask_bpwr_ctrl global() argument
209 reg_cg_check_apsrc_req_mask_bpwr_ctrl global() argument
210 reg_cg_check_vrf18_req_mask_bpwr_ctrl global() argument
211 reg_cg_check_ddren_req_mask_bpwr_ctrl global() argument
214 reg_dvfsrc_event_trigger_mask_bpwr_ctrl global() argument
215 reg_sw2spm_wakeup_mask_bpwr_ctrl global() argument
216 reg_adsp2spm_wakeup_mask_bpwr_ctrl global() argument
217 reg_sspm2spm_wakeup_mask_bpwr_ctrl global() argument
218 reg_scp2spm_wakeup_mask_bpwr_ctrl global() argument
219 reg_csyspwrup_ack_maskpwr_ctrl global() argument
220 reg_spm_reserved_srcclkena_mask_bpwr_ctrl global() argument
221 reg_spm_reserved_infra_req_mask_bpwr_ctrl global() argument
222 reg_spm_reserved_apsrc_req_mask_bpwr_ctrl global() argument
223 reg_spm_reserved_vrf18_req_mask_bpwr_ctrl global() argument
224 reg_spm_reserved_ddren_req_mask_bpwr_ctrl global() argument
225 reg_mcupm_srcclkena_mask_bpwr_ctrl global() argument
226 reg_mcupm_infra_req_mask_bpwr_ctrl global() argument
227 reg_mcupm_apsrc_req_mask_bpwr_ctrl global() argument
228 reg_mcupm_vrf18_req_mask_bpwr_ctrl global() argument
229 reg_mcupm_ddren_req_mask_bpwr_ctrl global() argument
230 reg_msdc0_srcclkena_mask_bpwr_ctrl global() argument
231 reg_msdc0_infra_req_mask_bpwr_ctrl global() argument
232 reg_msdc0_apsrc_req_mask_bpwr_ctrl global() argument
233 reg_msdc0_vrf18_req_mask_bpwr_ctrl global() argument
234 reg_msdc0_ddren_req_mask_bpwr_ctrl global() argument
235 reg_msdc1_srcclkena_mask_bpwr_ctrl global() argument
236 reg_msdc1_infra_req_mask_bpwr_ctrl global() argument
237 reg_msdc1_apsrc_req_mask_bpwr_ctrl global() argument
238 reg_msdc1_vrf18_req_mask_bpwr_ctrl global() argument
239 reg_msdc1_ddren_req_mask_bpwr_ctrl global() argument
242 reg_ccif_event_srcclkena_mask_bpwr_ctrl global() argument
243 reg_bak_psri_srcclkena_mask_bpwr_ctrl global() argument
244 reg_bak_psri_infra_req_mask_bpwr_ctrl global() argument
245 reg_bak_psri_apsrc_req_mask_bpwr_ctrl global() argument
246 reg_bak_psri_vrf18_req_mask_bpwr_ctrl global() argument
247 reg_bak_psri_ddren_req_mask_bpwr_ctrl global() argument
248 reg_dramc_md32_infra_req_mask_bpwr_ctrl global() argument
249 reg_dramc_md32_vrf18_req_mask_bpwr_ctrl global() argument
250 reg_conn_srcclkenb2pwrap_mask_bpwr_ctrl global() argument
251 reg_dramc_md32_apsrc_req_mask_bpwr_ctrl global() argument
254 reg_mcusys_merge_apsrc_req_mask_bpwr_ctrl global() argument
255 reg_mcusys_merge_ddren_req_mask_bpwr_ctrl global() argument
256 reg_afe_srcclkena_mask_bpwr_ctrl global() argument
257 reg_afe_infra_req_mask_bpwr_ctrl global() argument
258 reg_afe_apsrc_req_mask_bpwr_ctrl global() argument
259 reg_afe_vrf18_req_mask_bpwr_ctrl global() argument
260 reg_afe_ddren_req_mask_bpwr_ctrl global() argument
261 reg_msdc2_srcclkena_mask_bpwr_ctrl global() argument
262 reg_msdc2_infra_req_mask_bpwr_ctrl global() argument
263 reg_msdc2_apsrc_req_mask_bpwr_ctrl global() argument
264 reg_msdc2_vrf18_req_mask_bpwr_ctrl global() argument
[all...] |
| /arm-trusted-firmware/plat/mediatek/drivers/spm/mt8188/ |
| H A D | mt_spm_internal.h | 126 struct pwr_ctrl { struct
427 /* code gen by spm_pwr_ctrl_atf.pl, need struct pwr_ctrl */ argument
128 pcm_flagspwr_ctrl global() argument
130 pcm_flags_custpwr_ctrl global() argument
132 pcm_flags_cust_setpwr_ctrl global() argument
134 pcm_flags_cust_clrpwr_ctrl global() argument
135 pcm_flags1pwr_ctrl global() argument
137 pcm_flags1_custpwr_ctrl global() argument
139 pcm_flags1_cust_setpwr_ctrl global() argument
141 pcm_flags1_cust_clrpwr_ctrl global() argument
143 timer_valpwr_ctrl global() argument
145 timer_val_custpwr_ctrl global() argument
147 timer_val_ramp_enpwr_ctrl global() argument
149 timer_val_ramp_en_secpwr_ctrl global() argument
150 wake_srcpwr_ctrl global() argument
152 wake_src_custpwr_ctrl global() argument
154 wdt_disablepwr_ctrl global() argument
158 reg_wfi_oppwr_ctrl global() argument
160 reg_wfi_typepwr_ctrl global() argument
162 reg_mp0_cputop_idle_maskpwr_ctrl global() argument
164 reg_mp1_cputop_idle_maskpwr_ctrl global() argument
166 reg_mcusys_idle_maskpwr_ctrl global() argument
168 reg_md_apsrc_1_selpwr_ctrl global() argument
170 reg_md_apsrc_0_selpwr_ctrl global() argument
172 reg_conn_apsrc_selpwr_ctrl global() argument
176 reg_spm_apsrc_reqpwr_ctrl global() argument
178 reg_spm_f26m_reqpwr_ctrl global() argument
180 reg_spm_infra_reqpwr_ctrl global() argument
182 reg_spm_vrf18_reqpwr_ctrl global() argument
184 reg_spm_ddr_en_reqpwr_ctrl global() argument
186 reg_spm_dvfs_reqpwr_ctrl global() argument
188 reg_spm_sw_mailbox_reqpwr_ctrl global() argument
190 reg_spm_sspm_mailbox_reqpwr_ctrl global() argument
192 reg_spm_adsp_mailbox_reqpwr_ctrl global() argument
194 reg_spm_scp_mailbox_reqpwr_ctrl global() argument
198 reg_sspm_srcclkena_0_mask_bpwr_ctrl global() argument
200 reg_sspm_infra_req_0_mask_bpwr_ctrl global() argument
202 reg_sspm_apsrc_req_0_mask_bpwr_ctrl global() argument
204 reg_sspm_vrf18_req_0_mask_bpwr_ctrl global() argument
206 reg_sspm_ddr_en_0_mask_bpwr_ctrl global() argument
208 reg_scp_srcclkena_mask_bpwr_ctrl global() argument
210 reg_scp_infra_req_mask_bpwr_ctrl global() argument
212 reg_scp_apsrc_req_mask_bpwr_ctrl global() argument
214 reg_scp_vrf18_req_mask_bpwr_ctrl global() argument
216 reg_scp_ddr_en_mask_bpwr_ctrl global() argument
218 reg_audio_dsp_srcclkena_mask_bpwr_ctrl global() argument
220 reg_audio_dsp_infra_req_mask_bpwr_ctrl global() argument
222 reg_audio_dsp_apsrc_req_mask_bpwr_ctrl global() argument
224 reg_audio_dsp_vrf18_req_mask_bpwr_ctrl global() argument
226 reg_audio_dsp_ddr_en_mask_bpwr_ctrl global() argument
228 reg_apu_srcclkena_mask_bpwr_ctrl global() argument
230 reg_apu_infra_req_mask_bpwr_ctrl global() argument
232 reg_apu_apsrc_req_mask_bpwr_ctrl global() argument
234 reg_apu_vrf18_req_mask_bpwr_ctrl global() argument
236 reg_apu_ddr_en_mask_bpwr_ctrl global() argument
238 reg_cpueb_srcclkena_mask_bpwr_ctrl global() argument
240 reg_cpueb_infra_req_mask_bpwr_ctrl global() argument
242 reg_cpueb_apsrc_req_mask_bpwr_ctrl global() argument
244 reg_cpueb_vrf18_req_mask_bpwr_ctrl global() argument
246 reg_cpueb_ddr_en_mask_bpwr_ctrl global() argument
248 reg_bak_psri_srcclkena_mask_bpwr_ctrl global() argument
250 reg_bak_psri_infra_req_mask_bpwr_ctrl global() argument
252 reg_bak_psri_apsrc_req_mask_bpwr_ctrl global() argument
254 reg_bak_psri_vrf18_req_mask_bpwr_ctrl global() argument
256 reg_bak_psri_ddr_en_mask_bpwr_ctrl global() argument
258 reg_cam_ddren_req_mask_bpwr_ctrl global() argument
260 reg_img_ddren_req_mask_bpwr_ctrl global() argument
264 reg_msdc0_srcclkena_mask_bpwr_ctrl global() argument
266 reg_msdc0_infra_req_mask_bpwr_ctrl global() argument
268 reg_msdc0_apsrc_req_mask_bpwr_ctrl global() argument
270 reg_msdc0_vrf18_req_mask_bpwr_ctrl global() argument
272 reg_msdc0_ddr_en_mask_bpwr_ctrl global() argument
274 reg_msdc1_srcclkena_mask_bpwr_ctrl global() argument
276 reg_msdc1_infra_req_mask_bpwr_ctrl global() argument
278 reg_msdc1_apsrc_req_mask_bpwr_ctrl global() argument
280 reg_msdc1_vrf18_req_mask_bpwr_ctrl global() argument
282 reg_msdc1_ddr_en_mask_bpwr_ctrl global() argument
284 reg_msdc2_srcclkena_mask_bpwr_ctrl global() argument
286 reg_msdc2_infra_req_mask_bpwr_ctrl global() argument
288 reg_msdc2_apsrc_req_mask_bpwr_ctrl global() argument
290 reg_msdc2_vrf18_req_mask_bpwr_ctrl global() argument
292 reg_msdc2_ddr_en_mask_bpwr_ctrl global() argument
294 reg_ufs_srcclkena_mask_bpwr_ctrl global() argument
296 reg_ufs_infra_req_mask_bpwr_ctrl global() argument
298 reg_ufs_apsrc_req_mask_bpwr_ctrl global() argument
300 reg_ufs_vrf18_req_mask_bpwr_ctrl global() argument
302 reg_ufs_ddr_en_mask_bpwr_ctrl global() argument
304 reg_usb_srcclkena_mask_bpwr_ctrl global() argument
306 reg_usb_infra_req_mask_bpwr_ctrl global() argument
308 reg_usb_apsrc_req_mask_bpwr_ctrl global() argument
310 reg_usb_vrf18_req_mask_bpwr_ctrl global() argument
312 reg_usb_ddr_en_mask_bpwr_ctrl global() argument
314 reg_pextp_p0_srcclkena_mask_bpwr_ctrl global() argument
316 reg_pextp_p0_infra_req_mask_bpwr_ctrl global() argument
318 reg_pextp_p0_apsrc_req_mask_bpwr_ctrl global() argument
320 reg_pextp_p0_vrf18_req_mask_bpwr_ctrl global() argument
322 reg_pextp_p0_ddr_en_mask_bpwr_ctrl global() argument
326 reg_pextp_p1_srcclkena_mask_bpwr_ctrl global() argument
328 reg_pextp_p1_infra_req_mask_bpwr_ctrl global() argument
330 reg_pextp_p1_apsrc_req_mask_bpwr_ctrl global() argument
332 reg_pextp_p1_vrf18_req_mask_bpwr_ctrl global() argument
334 reg_pextp_p1_ddr_en_mask_bpwr_ctrl global() argument
336 reg_gce0_infra_req_mask_bpwr_ctrl global() argument
338 reg_gce0_apsrc_req_mask_bpwr_ctrl global() argument
340 reg_gce0_vrf18_req_mask_bpwr_ctrl global() argument
342 reg_gce0_ddr_en_mask_bpwr_ctrl global() argument
344 reg_gce1_infra_req_mask_bpwr_ctrl global() argument
346 reg_gce1_apsrc_req_mask_bpwr_ctrl global() argument
348 reg_gce1_vrf18_req_mask_bpwr_ctrl global() argument
350 reg_gce1_ddr_en_mask_bpwr_ctrl global() argument
352 reg_spm_srcclkena_reserved_mask_bpwr_ctrl global() argument
354 reg_spm_infra_req_reserved_mask_bpwr_ctrl global() argument
356 reg_spm_apsrc_req_reserved_mask_bpwr_ctrl global() argument
358 reg_spm_vrf18_req_reserved_mask_bpwr_ctrl global() argument
360 reg_spm_ddr_en_reserved_mask_bpwr_ctrl global() argument
362 reg_disp0_apsrc_req_mask_bpwr_ctrl global() argument
364 reg_disp0_ddr_en_mask_bpwr_ctrl global() argument
366 reg_disp1_apsrc_req_mask_bpwr_ctrl global() argument
368 reg_disp1_ddr_en_mask_bpwr_ctrl global() argument
370 reg_disp2_apsrc_req_mask_bpwr_ctrl global() argument
372 reg_disp2_ddr_en_mask_bpwr_ctrl global() argument
374 reg_disp3_apsrc_req_mask_bpwr_ctrl global() argument
376 reg_disp3_ddr_en_mask_bpwr_ctrl global() argument
378 reg_infrasys_apsrc_req_mask_bpwr_ctrl global() argument
380 reg_infrasys_ddr_en_mask_bpwr_ctrl global() argument
382 reg_cg_check_srcclkena_mask_bpwr_ctrl global() argument
384 reg_cg_check_apsrc_req_mask_bpwr_ctrl global() argument
386 reg_cg_check_vrf18_req_mask_bpwr_ctrl global() argument
388 reg_cg_check_ddr_en_mask_bpwr_ctrl global() argument
392 reg_mcusys_merge_apsrc_req_mask_bpwr_ctrl global() argument
394 reg_mcusys_merge_ddr_en_mask_bpwr_ctrl global() argument
396 reg_dramc_md32_infra_req_mask_bpwr_ctrl global() argument
398 reg_dramc_md32_vrf18_req_mask_bpwr_ctrl global() argument
400 reg_dramc_md32_ddr_en_mask_bpwr_ctrl global() argument
402 reg_dvfsrc_event_trigger_mask_bpwr_ctrl global() argument
|
| /arm-trusted-firmware/plat/mediatek/mt8195/drivers/spm/ |
| H A D | mt_spm_internal.h | 112 struct pwr_ctrl { struct
272 /* code gen by spm_pwr_ctrl_atf.pl, need struct pwr_ctrl */ argument
113 pcm_flagspwr_ctrl global() argument
114 pcm_flags_custpwr_ctrl global() argument
115 pcm_flags_cust_setpwr_ctrl global() argument
116 pcm_flags_cust_clrpwr_ctrl global() argument
117 pcm_flags1pwr_ctrl global() argument
118 pcm_flags1_custpwr_ctrl global() argument
119 pcm_flags1_cust_setpwr_ctrl global() argument
120 pcm_flags1_cust_clrpwr_ctrl global() argument
121 timer_valpwr_ctrl global() argument
122 timer_val_custpwr_ctrl global() argument
123 timer_val_ramp_enpwr_ctrl global() argument
124 timer_val_ramp_en_secpwr_ctrl global() argument
125 wake_srcpwr_ctrl global() argument
126 wake_src_custpwr_ctrl global() argument
127 wdt_disablepwr_ctrl global() argument
130 reg_wfi_oppwr_ctrl global() argument
131 reg_wfi_typepwr_ctrl global() argument
132 reg_mp0_cputop_idle_maskpwr_ctrl global() argument
133 reg_mp1_cputop_idle_maskpwr_ctrl global() argument
134 reg_mcusys_idle_maskpwr_ctrl global() argument
135 reg_md_apsrc_1_selpwr_ctrl global() argument
136 reg_md_apsrc_0_selpwr_ctrl global() argument
137 reg_conn_apsrc_selpwr_ctrl global() argument
140 reg_spm_apsrc_reqpwr_ctrl global() argument
141 reg_spm_f26m_reqpwr_ctrl global() argument
142 reg_spm_infra_reqpwr_ctrl global() argument
143 reg_spm_vrf18_reqpwr_ctrl global() argument
144 reg_spm_ddr_en_reqpwr_ctrl global() argument
145 reg_spm_dvfs_reqpwr_ctrl global() argument
146 reg_spm_sw_mailbox_reqpwr_ctrl global() argument
147 reg_spm_sspm_mailbox_reqpwr_ctrl global() argument
148 reg_spm_adsp_mailbox_reqpwr_ctrl global() argument
149 reg_spm_scp_mailbox_reqpwr_ctrl global() argument
152 reg_sspm_srcclkena_0_mask_bpwr_ctrl global() argument
153 reg_sspm_infra_req_0_mask_bpwr_ctrl global() argument
154 reg_sspm_apsrc_req_0_mask_bpwr_ctrl global() argument
155 reg_sspm_vrf18_req_0_mask_bpwr_ctrl global() argument
156 reg_sspm_ddr_en_0_mask_bpwr_ctrl global() argument
157 reg_scp_srcclkena_mask_bpwr_ctrl global() argument
158 reg_scp_infra_req_mask_bpwr_ctrl global() argument
159 reg_scp_apsrc_req_mask_bpwr_ctrl global() argument
160 reg_scp_vrf18_req_mask_bpwr_ctrl global() argument
161 reg_scp_ddr_en_mask_bpwr_ctrl global() argument
162 reg_audio_dsp_srcclkena_mask_bpwr_ctrl global() argument
163 reg_audio_dsp_infra_req_mask_bpwr_ctrl global() argument
164 reg_audio_dsp_apsrc_req_mask_bpwr_ctrl global() argument
165 reg_audio_dsp_vrf18_req_mask_bpwr_ctrl global() argument
166 reg_audio_dsp_ddr_en_mask_bpwr_ctrl global() argument
167 reg_apu_srcclkena_mask_bpwr_ctrl global() argument
168 reg_apu_infra_req_mask_bpwr_ctrl global() argument
169 reg_apu_apsrc_req_mask_bpwr_ctrl global() argument
170 reg_apu_vrf18_req_mask_bpwr_ctrl global() argument
171 reg_apu_ddr_en_mask_bpwr_ctrl global() argument
172 reg_cpueb_srcclkena_mask_bpwr_ctrl global() argument
173 reg_cpueb_infra_req_mask_bpwr_ctrl global() argument
174 reg_cpueb_apsrc_req_mask_bpwr_ctrl global() argument
175 reg_cpueb_vrf18_req_mask_bpwr_ctrl global() argument
176 reg_cpueb_ddr_en_mask_bpwr_ctrl global() argument
177 reg_bak_psri_srcclkena_mask_bpwr_ctrl global() argument
178 reg_bak_psri_infra_req_mask_bpwr_ctrl global() argument
179 reg_bak_psri_apsrc_req_mask_bpwr_ctrl global() argument
180 reg_bak_psri_vrf18_req_mask_bpwr_ctrl global() argument
181 reg_bak_psri_ddr_en_mask_bpwr_ctrl global() argument
184 reg_msdc0_srcclkena_mask_bpwr_ctrl global() argument
185 reg_msdc0_infra_req_mask_bpwr_ctrl global() argument
186 reg_msdc0_apsrc_req_mask_bpwr_ctrl global() argument
187 reg_msdc0_vrf18_req_mask_bpwr_ctrl global() argument
188 reg_msdc0_ddr_en_mask_bpwr_ctrl global() argument
189 reg_msdc1_srcclkena_mask_bpwr_ctrl global() argument
190 reg_msdc1_infra_req_mask_bpwr_ctrl global() argument
191 reg_msdc1_apsrc_req_mask_bpwr_ctrl global() argument
192 reg_msdc1_vrf18_req_mask_bpwr_ctrl global() argument
193 reg_msdc1_ddr_en_mask_bpwr_ctrl global() argument
194 reg_msdc2_srcclkena_mask_bpwr_ctrl global() argument
195 reg_msdc2_infra_req_mask_bpwr_ctrl global() argument
196 reg_msdc2_apsrc_req_mask_bpwr_ctrl global() argument
197 reg_msdc2_vrf18_req_mask_bpwr_ctrl global() argument
198 reg_msdc2_ddr_en_mask_bpwr_ctrl global() argument
199 reg_ufs_srcclkena_mask_bpwr_ctrl global() argument
200 reg_ufs_infra_req_mask_bpwr_ctrl global() argument
201 reg_ufs_apsrc_req_mask_bpwr_ctrl global() argument
202 reg_ufs_vrf18_req_mask_bpwr_ctrl global() argument
203 reg_ufs_ddr_en_mask_bpwr_ctrl global() argument
204 reg_usb_srcclkena_mask_bpwr_ctrl global() argument
205 reg_usb_infra_req_mask_bpwr_ctrl global() argument
206 reg_usb_apsrc_req_mask_bpwr_ctrl global() argument
207 reg_usb_vrf18_req_mask_bpwr_ctrl global() argument
208 reg_usb_ddr_en_mask_bpwr_ctrl global() argument
209 reg_pextp_p0_srcclkena_mask_bpwr_ctrl global() argument
210 reg_pextp_p0_infra_req_mask_bpwr_ctrl global() argument
211 reg_pextp_p0_apsrc_req_mask_bpwr_ctrl global() argument
212 reg_pextp_p0_vrf18_req_mask_bpwr_ctrl global() argument
213 reg_pextp_p0_ddr_en_mask_bpwr_ctrl global() argument
216 reg_pextp_p1_srcclkena_mask_bpwr_ctrl global() argument
217 reg_pextp_p1_infra_req_mask_bpwr_ctrl global() argument
218 reg_pextp_p1_apsrc_req_mask_bpwr_ctrl global() argument
219 reg_pextp_p1_vrf18_req_mask_bpwr_ctrl global() argument
220 reg_pextp_p1_ddr_en_mask_bpwr_ctrl global() argument
221 reg_gce0_infra_req_mask_bpwr_ctrl global() argument
222 reg_gce0_apsrc_req_mask_bpwr_ctrl global() argument
223 reg_gce0_vrf18_req_mask_bpwr_ctrl global() argument
224 reg_gce0_ddr_en_mask_bpwr_ctrl global() argument
225 reg_gce1_infra_req_mask_bpwr_ctrl global() argument
226 reg_gce1_apsrc_req_mask_bpwr_ctrl global() argument
227 reg_gce1_vrf18_req_mask_bpwr_ctrl global() argument
228 reg_gce1_ddr_en_mask_bpwr_ctrl global() argument
229 reg_spm_srcclkena_reserved_mask_bpwr_ctrl global() argument
230 reg_spm_infra_req_reserved_mask_bpwr_ctrl global() argument
231 reg_spm_apsrc_req_reserved_mask_bpwr_ctrl global() argument
232 reg_spm_vrf18_req_reserved_mask_bpwr_ctrl global() argument
233 reg_spm_ddr_en_reserved_mask_bpwr_ctrl global() argument
234 reg_disp0_apsrc_req_mask_bpwr_ctrl global() argument
235 reg_disp0_ddr_en_mask_bpwr_ctrl global() argument
236 reg_disp1_apsrc_req_mask_bpwr_ctrl global() argument
237 reg_disp1_ddr_en_mask_bpwr_ctrl global() argument
238 reg_disp2_apsrc_req_mask_bpwr_ctrl global() argument
239 reg_disp2_ddr_en_mask_bpwr_ctrl global() argument
240 reg_disp3_apsrc_req_mask_bpwr_ctrl global() argument
241 reg_disp3_ddr_en_mask_bpwr_ctrl global() argument
242 reg_infrasys_apsrc_req_mask_bpwr_ctrl global() argument
243 reg_infrasys_ddr_en_mask_bpwr_ctrl global() argument
244 reg_cg_check_srcclkena_mask_bpwr_ctrl global() argument
245 reg_cg_check_apsrc_req_mask_bpwr_ctrl global() argument
246 reg_cg_check_vrf18_req_mask_bpwr_ctrl global() argument
247 reg_cg_check_ddr_en_mask_bpwr_ctrl global() argument
[all...] |
| /arm-trusted-firmware/plat/mediatek/drivers/cpu_pm/cpcv3_2/ |
| H A D | mt_smp.c | 25 struct cpu_pwr_ctrl *pwr_ctrl) in mt_smp_core_init_arch() argument
38 void mt_smp_core_bootup_address_set(struct cpu_pwr_ctrl *pwr_ctrl, uintptr_t entry) in mt_smp_core_bootup_address_set() argument
46 int mt_smp_power_core_on(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl) in mt_smp_power_core_on() argument
81 mt_smp_power_core_off(struct cpu_pwr_ctrl * pwr_ctrl) mt_smp_power_core_off() argument
[all...] |
| H A D | mt_cpu_pm.c | 72 struct cpu_pwr_ctrl pwr_ctrl; in cpupm_cpu_pwr_on_prepare() local
94 struct cpu_pwr_ctrl pwr_ctrl; in cpupm_cpu_suspend_smp() local
|
| /arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/ |
| H A D | spm.h | 211 struct pwr_ctrl { struct
212 pcm_flagspwr_ctrl global() argument
213 pcm_flags_custpwr_ctrl global() argument
214 pcm_reservepwr_ctrl global() argument
215 timer_valpwr_ctrl global() argument
216 timer_val_custpwr_ctrl global() argument
217 wake_srcpwr_ctrl global() argument
218 wake_src_custpwr_ctrl global() argument
219 wake_src_md32pwr_ctrl global() argument
220 r0_ctrl_enpwr_ctrl global() argument
221 r7_ctrl_enpwr_ctrl global() argument
222 infra_dcm_lockpwr_ctrl global() argument
223 pcm_apsrc_reqpwr_ctrl global() argument
224 mcusys_idle_maskpwr_ctrl global() argument
225 ca15top_idle_maskpwr_ctrl global() argument
226 ca7top_idle_maskpwr_ctrl global() argument
227 wfi_oppwr_ctrl global() argument
228 ca15_wfi0_enpwr_ctrl global() argument
229 ca15_wfi1_enpwr_ctrl global() argument
230 ca15_wfi2_enpwr_ctrl global() argument
231 ca15_wfi3_enpwr_ctrl global() argument
232 ca7_wfi0_enpwr_ctrl global() argument
233 ca7_wfi1_enpwr_ctrl global() argument
234 ca7_wfi2_enpwr_ctrl global() argument
235 ca7_wfi3_enpwr_ctrl global() argument
236 disp_req_maskpwr_ctrl global() argument
237 mfg_req_maskpwr_ctrl global() argument
238 md32_req_maskpwr_ctrl global() argument
239 syspwreq_maskpwr_ctrl global() argument
240 srclkenai_maskpwr_ctrl global() argument
|
| /arm-trusted-firmware/plat/mediatek/mt8183/drivers/spm/ |
| H A D | spm.h | 2382 struct pwr_ctrl { struct
2383 pcm_flagspwr_ctrl global() argument
2384 pcm_flags1pwr_ctrl global() argument
2385 timer_valpwr_ctrl global() argument
2386 wake_srcpwr_ctrl global() argument
2389 wfi_oppwr_ctrl global() argument
2390 mp0_cputop_idle_maskpwr_ctrl global() argument
2391 mp1_cputop_idle_maskpwr_ctrl global() argument
2392 mcusys_idle_maskpwr_ctrl global() argument
2393 mm_mask_bpwr_ctrl global() argument
2394 md_ddr_en_0_dbc_enpwr_ctrl global() argument
2395 md_ddr_en_1_dbc_enpwr_ctrl global() argument
2396 md_mask_bpwr_ctrl global() argument
2397 sspm_mask_bpwr_ctrl global() argument
2398 scp_mask_bpwr_ctrl global() argument
2399 srcclkeni_mask_bpwr_ctrl global() argument
2400 md_apsrc_1_selpwr_ctrl global() argument
2401 md_apsrc_0_selpwr_ctrl global() argument
2402 conn_ddr_en_dbc_enpwr_ctrl global() argument
2403 conn_mask_bpwr_ctrl global() argument
2404 conn_apsrc_selpwr_ctrl global() argument
2407 spm_apsrc_reqpwr_ctrl global() argument
2408 spm_f26m_reqpwr_ctrl global() argument
2409 spm_infra_reqpwr_ctrl global() argument
2410 spm_vrf18_reqpwr_ctrl global() argument
2411 spm_ddren_reqpwr_ctrl global() argument
2412 spm_rsv_src_reqpwr_ctrl global() argument
2413 spm_ddren_2_reqpwr_ctrl global() argument
2414 cpu_md_dvfs_sop_force_onpwr_ctrl global() argument
2417 csyspwreq_maskpwr_ctrl global() argument
2418 ccif0_md_event_mask_bpwr_ctrl global() argument
2419 ccif0_ap_event_mask_bpwr_ctrl global() argument
2420 ccif1_md_event_mask_bpwr_ctrl global() argument
2421 ccif1_ap_event_mask_bpwr_ctrl global() argument
2422 ccif2_md_event_mask_bpwr_ctrl global() argument
2423 ccif2_ap_event_mask_bpwr_ctrl global() argument
2424 ccif3_md_event_mask_bpwr_ctrl global() argument
2425 ccif3_ap_event_mask_bpwr_ctrl global() argument
2426 md_srcclkena_0_infra_mask_bpwr_ctrl global() argument
2427 md_srcclkena_1_infra_mask_bpwr_ctrl global() argument
2428 conn_srcclkena_infra_mask_bpwr_ctrl global() argument
2429 ufs_infra_req_mask_bpwr_ctrl global() argument
2430 srcclkeni_infra_mask_bpwr_ctrl global() argument
2431 md_apsrc_req_0_infra_mask_bpwr_ctrl global() argument
2432 md_apsrc_req_1_infra_mask_bpwr_ctrl global() argument
2433 conn_apsrcreq_infra_mask_bpwr_ctrl global() argument
2434 ufs_srcclkena_mask_bpwr_ctrl global() argument
2435 md_vrf18_req_0_mask_bpwr_ctrl global() argument
2436 md_vrf18_req_1_mask_bpwr_ctrl global() argument
2437 ufs_vrf18_req_mask_bpwr_ctrl global() argument
2438 gce_vrf18_req_mask_bpwr_ctrl global() argument
2439 conn_infra_req_mask_bpwr_ctrl global() argument
2440 gce_apsrc_req_mask_bpwr_ctrl global() argument
2441 disp0_apsrc_req_mask_bpwr_ctrl global() argument
2442 disp1_apsrc_req_mask_bpwr_ctrl global() argument
2443 mfg_req_mask_bpwr_ctrl global() argument
2444 vdec_req_mask_bpwr_ctrl global() argument
2447 md_ddr_en_0_mask_bpwr_ctrl global() argument
2448 md_ddr_en_1_mask_bpwr_ctrl global() argument
2449 conn_ddr_en_mask_bpwr_ctrl global() argument
2450 ddren_sspm_apsrc_req_mask_bpwr_ctrl global() argument
2451 ddren_scp_apsrc_req_mask_bpwr_ctrl global() argument
2452 disp0_ddren_mask_bpwr_ctrl global() argument
2453 disp1_ddren_mask_bpwr_ctrl global() argument
2454 gce_ddren_mask_bpwr_ctrl global() argument
2455 ddren_emi_self_refresh_ch0_mask_bpwr_ctrl global() argument
2456 ddren_emi_self_refresh_ch1_mask_bpwr_ctrl global() argument
2459 spm_wakeup_event_maskpwr_ctrl global() argument
2462 spm_wakeup_event_ext_maskpwr_ctrl global() argument
2465 md_ddr_en_2_0_mask_bpwr_ctrl global() argument
2466 md_ddr_en_2_1_mask_bpwr_ctrl global() argument
2467 conn_ddr_en_2_mask_bpwr_ctrl global() argument
2468 ddren2_sspm_apsrc_req_mask_bpwr_ctrl global() argument
2469 ddren2_scp_apsrc_req_mask_bpwr_ctrl global() argument
2470 disp0_ddren2_mask_bpwr_ctrl global() argument
2471 disp1_ddren2_mask_bpwr_ctrl global() argument
2472 gce_ddren2_mask_bpwr_ctrl global() argument
2473 ddren2_emi_self_refresh_ch0_mask_bpwr_ctrl global() argument
2474 ddren2_emi_self_refresh_ch1_mask_bpwr_ctrl global() argument
2476 mp0_cpu0_wfi_enpwr_ctrl global() argument
2477 mp0_cpu1_wfi_enpwr_ctrl global() argument
2478 mp0_cpu2_wfi_enpwr_ctrl global() argument
2479 mp0_cpu3_wfi_enpwr_ctrl global() argument
2481 mp1_cpu0_wfi_enpwr_ctrl global() argument
2482 mp1_cpu1_wfi_enpwr_ctrl global() argument
2483 mp1_cpu2_wfi_enpwr_ctrl global() argument
2484 mp1_cpu3_wfi_enpwr_ctrl global() argument
|
| /arm-trusted-firmware/plat/mediatek/mt8173/drivers/mtcmos/ |
| H A D | mtcmos.c | 162 uint32_t wait_mtcmos_ack(uint32_t on, uint32_t pwr_ctrl, uint32_t spm_pwr_sta) in wait_mtcmos_ack() argument
|