xref: /arm-trusted-firmware/tools/renesas/rcar_layout_create/sa0.ld.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu */
6*91f16700Schasinglulu
7*91f16700SchasingluluSECTIONS
8*91f16700Schasinglulu{
9*91f16700Schasinglulu	. = 0x00000000;
10*91f16700Schasinglulu	.rodata : {
11*91f16700Schasinglulu		KEEP(*(.sa0_bootrom))
12*91f16700Schasinglulu		/* Map Type 3 for eMMC Boot */
13*91f16700Schasinglulu                /* A-side IPL content cert "Start Address" */
14*91f16700Schasinglulu		. = 0x000001D4;		/* H'00000080 + H'00000154 */
15*91f16700Schasinglulu		KEEP(*(.sa0_bl2dst_addr3))
16*91f16700Schasinglulu                /* A-side IPL content cert "Size" */
17*91f16700Schasinglulu		. = 0x000002E4;		/* H'00000080 + H'00000264 */
18*91f16700Schasinglulu		KEEP(*(.sa0_bl2dst_size3))
19*91f16700Schasinglulu		/* Map Type 1 for HyperFlash/QSPI Flash Boot */
20*91f16700Schasinglulu		/* A-side IPL content cert "Start Address" */
21*91f16700Schasinglulu		. = 0x00000D54;		/* H'00000C00 + H'00000154 */
22*91f16700Schasinglulu		KEEP(*(.sa0_bl2dst_addr1))
23*91f16700Schasinglulu		/* A-side IPL content cert "Size" */
24*91f16700Schasinglulu		. = 0x00000E64;		/* H'00000C00 + H'00000264 */
25*91f16700Schasinglulu		KEEP(*(.sa0_bl2dst_size1))
26*91f16700Schasinglulu	}
27*91f16700Schasinglulu
28*91f16700Schasinglulu}
29