1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019-2023, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef SPMD_PRIVATE_H 8*91f16700Schasinglulu #define SPMD_PRIVATE_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <common/bl_common.h> 11*91f16700Schasinglulu #include <context.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu /******************************************************************************* 14*91f16700Schasinglulu * Constants that allow assembler code to preserve callee-saved registers of the 15*91f16700Schasinglulu * C runtime context while performing a security state switch. 16*91f16700Schasinglulu ******************************************************************************/ 17*91f16700Schasinglulu #define SPMD_C_RT_CTX_X19 0x0 18*91f16700Schasinglulu #define SPMD_C_RT_CTX_X20 0x8 19*91f16700Schasinglulu #define SPMD_C_RT_CTX_X21 0x10 20*91f16700Schasinglulu #define SPMD_C_RT_CTX_X22 0x18 21*91f16700Schasinglulu #define SPMD_C_RT_CTX_X23 0x20 22*91f16700Schasinglulu #define SPMD_C_RT_CTX_X24 0x28 23*91f16700Schasinglulu #define SPMD_C_RT_CTX_X25 0x30 24*91f16700Schasinglulu #define SPMD_C_RT_CTX_X26 0x38 25*91f16700Schasinglulu #define SPMD_C_RT_CTX_X27 0x40 26*91f16700Schasinglulu #define SPMD_C_RT_CTX_X28 0x48 27*91f16700Schasinglulu #define SPMD_C_RT_CTX_X29 0x50 28*91f16700Schasinglulu #define SPMD_C_RT_CTX_X30 0x58 29*91f16700Schasinglulu 30*91f16700Schasinglulu #define SPMD_C_RT_CTX_SIZE 0x60 31*91f16700Schasinglulu #define SPMD_C_RT_CTX_ENTRIES (SPMD_C_RT_CTX_SIZE >> DWORD_SHIFT) 32*91f16700Schasinglulu 33*91f16700Schasinglulu #ifndef __ASSEMBLER__ 34*91f16700Schasinglulu #include <stdint.h> 35*91f16700Schasinglulu #include <lib/psci/psci_lib.h> 36*91f16700Schasinglulu #include <plat/common/platform.h> 37*91f16700Schasinglulu #include <services/ffa_svc.h> 38*91f16700Schasinglulu 39*91f16700Schasinglulu typedef enum spmc_state { 40*91f16700Schasinglulu SPMC_STATE_RESET = 0, 41*91f16700Schasinglulu SPMC_STATE_OFF, 42*91f16700Schasinglulu SPMC_STATE_ON_PENDING, 43*91f16700Schasinglulu SPMC_STATE_ON 44*91f16700Schasinglulu } spmc_state_t; 45*91f16700Schasinglulu 46*91f16700Schasinglulu /* 47*91f16700Schasinglulu * Data structure used by the SPM dispatcher (SPMD) in EL3 to track context of 48*91f16700Schasinglulu * the SPM core (SPMC) at the next lower EL. 49*91f16700Schasinglulu */ 50*91f16700Schasinglulu typedef struct spmd_spm_core_context { 51*91f16700Schasinglulu uint64_t c_rt_ctx; 52*91f16700Schasinglulu cpu_context_t cpu_ctx; 53*91f16700Schasinglulu spmc_state_t state; 54*91f16700Schasinglulu bool secure_interrupt_ongoing; 55*91f16700Schasinglulu #if ENABLE_SPMD_LP 56*91f16700Schasinglulu uint8_t spmd_lp_sync_req_ongoing; 57*91f16700Schasinglulu #endif 58*91f16700Schasinglulu } spmd_spm_core_context_t; 59*91f16700Schasinglulu 60*91f16700Schasinglulu /* Flags to indicate ongoing requests for SPMD EL3 logical partitions */ 61*91f16700Schasinglulu #define SPMD_LP_FFA_DIR_REQ_ONGOING U(0x1) 62*91f16700Schasinglulu #define SPMD_LP_FFA_INFO_GET_REG_ONGOING U(0x2) 63*91f16700Schasinglulu 64*91f16700Schasinglulu /* 65*91f16700Schasinglulu * Reserve ID for NS physical FFA Endpoint. 66*91f16700Schasinglulu */ 67*91f16700Schasinglulu #define FFA_NS_ENDPOINT_ID U(0) 68*91f16700Schasinglulu 69*91f16700Schasinglulu /* Define SPMD target function IDs for framework messages to the SPMC */ 70*91f16700Schasinglulu #define SPMD_FWK_MSG_FFA_VERSION_REQ U(0x8) 71*91f16700Schasinglulu #define SPMD_FWK_MSG_FFA_VERSION_RESP U(0x9) 72*91f16700Schasinglulu 73*91f16700Schasinglulu /* Function to build SPMD to SPMC message */ 74*91f16700Schasinglulu void spmd_build_spmc_message(gp_regs_t *gpregs, uint8_t target, 75*91f16700Schasinglulu unsigned long long message); 76*91f16700Schasinglulu 77*91f16700Schasinglulu /* Functions used to enter/exit SPMC synchronously */ 78*91f16700Schasinglulu uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *ctx); 79*91f16700Schasinglulu __dead2 void spmd_spm_core_sync_exit(uint64_t rc); 80*91f16700Schasinglulu 81*91f16700Schasinglulu /* Assembly helpers */ 82*91f16700Schasinglulu uint64_t spmd_spm_core_enter(uint64_t *c_rt_ctx); 83*91f16700Schasinglulu void __dead2 spmd_spm_core_exit(uint64_t c_rt_ctx, uint64_t ret); 84*91f16700Schasinglulu 85*91f16700Schasinglulu /* SPMD SPD power management handlers */ 86*91f16700Schasinglulu extern const spd_pm_ops_t spmd_pm; 87*91f16700Schasinglulu 88*91f16700Schasinglulu /* SPMC entry point information helper */ 89*91f16700Schasinglulu entry_point_info_t *spmd_spmc_ep_info_get(void); 90*91f16700Schasinglulu 91*91f16700Schasinglulu /* SPMC ID getter */ 92*91f16700Schasinglulu uint16_t spmd_spmc_id_get(void); 93*91f16700Schasinglulu 94*91f16700Schasinglulu /* SPMC context on CPU based on mpidr */ 95*91f16700Schasinglulu spmd_spm_core_context_t *spmd_get_context_by_mpidr(uint64_t mpidr); 96*91f16700Schasinglulu 97*91f16700Schasinglulu /* SPMC context on current CPU get helper */ 98*91f16700Schasinglulu spmd_spm_core_context_t *spmd_get_context(void); 99*91f16700Schasinglulu 100*91f16700Schasinglulu int spmd_pm_secondary_ep_register(uintptr_t entry_point); 101*91f16700Schasinglulu bool spmd_check_address_in_binary_image(uint64_t address); 102*91f16700Schasinglulu 103*91f16700Schasinglulu /* 104*91f16700Schasinglulu * Platform hook in EL3 firmware to handle for Group0 secure interrupt. 105*91f16700Schasinglulu * Return values: 106*91f16700Schasinglulu * 0 = success 107*91f16700Schasinglulu * otherwise it returns a negative value 108*91f16700Schasinglulu */ 109*91f16700Schasinglulu int plat_spmd_handle_group0_interrupt(uint32_t id); 110*91f16700Schasinglulu 111*91f16700Schasinglulu uint64_t spmd_ffa_error_return(void *handle, int error_code); 112*91f16700Schasinglulu 113*91f16700Schasinglulu #endif /* __ASSEMBLER__ */ 114*91f16700Schasinglulu 115*91f16700Schasinglulu #endif /* SPMD_PRIVATE_H */ 116