1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef SPM_MM_PRIVATE_H 8*91f16700Schasinglulu #define SPM_MM_PRIVATE_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <context.h> 11*91f16700Schasinglulu #include "spm_common.h" 12*91f16700Schasinglulu 13*91f16700Schasinglulu /******************************************************************************* 14*91f16700Schasinglulu * Constants that allow assembler code to preserve callee-saved registers of the 15*91f16700Schasinglulu * C runtime context while performing a security state switch. 16*91f16700Schasinglulu ******************************************************************************/ 17*91f16700Schasinglulu #define SP_C_RT_CTX_X19 0x0 18*91f16700Schasinglulu #define SP_C_RT_CTX_X20 0x8 19*91f16700Schasinglulu #define SP_C_RT_CTX_X21 0x10 20*91f16700Schasinglulu #define SP_C_RT_CTX_X22 0x18 21*91f16700Schasinglulu #define SP_C_RT_CTX_X23 0x20 22*91f16700Schasinglulu #define SP_C_RT_CTX_X24 0x28 23*91f16700Schasinglulu #define SP_C_RT_CTX_X25 0x30 24*91f16700Schasinglulu #define SP_C_RT_CTX_X26 0x38 25*91f16700Schasinglulu #define SP_C_RT_CTX_X27 0x40 26*91f16700Schasinglulu #define SP_C_RT_CTX_X28 0x48 27*91f16700Schasinglulu #define SP_C_RT_CTX_X29 0x50 28*91f16700Schasinglulu #define SP_C_RT_CTX_X30 0x58 29*91f16700Schasinglulu 30*91f16700Schasinglulu #define SP_C_RT_CTX_SIZE 0x60 31*91f16700Schasinglulu #define SP_C_RT_CTX_ENTRIES (SP_C_RT_CTX_SIZE >> DWORD_SHIFT) 32*91f16700Schasinglulu 33*91f16700Schasinglulu #ifndef __ASSEMBLER__ 34*91f16700Schasinglulu 35*91f16700Schasinglulu #include <stdint.h> 36*91f16700Schasinglulu 37*91f16700Schasinglulu #include <lib/spinlock.h> 38*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_v2.h> 39*91f16700Schasinglulu 40*91f16700Schasinglulu typedef enum sp_state { 41*91f16700Schasinglulu SP_STATE_RESET = 0, 42*91f16700Schasinglulu SP_STATE_IDLE, 43*91f16700Schasinglulu SP_STATE_BUSY 44*91f16700Schasinglulu } sp_state_t; 45*91f16700Schasinglulu 46*91f16700Schasinglulu typedef struct sp_context { 47*91f16700Schasinglulu uint64_t c_rt_ctx; 48*91f16700Schasinglulu cpu_context_t cpu_ctx; 49*91f16700Schasinglulu xlat_ctx_t *xlat_ctx_handle; 50*91f16700Schasinglulu 51*91f16700Schasinglulu sp_state_t state; 52*91f16700Schasinglulu spinlock_t state_lock; 53*91f16700Schasinglulu } sp_context_t; 54*91f16700Schasinglulu 55*91f16700Schasinglulu 56*91f16700Schasinglulu void spm_sp_setup(sp_context_t *sp_ctx); 57*91f16700Schasinglulu 58*91f16700Schasinglulu int32_t spm_memory_attributes_get_smc_handler(sp_context_t *sp_ctx, 59*91f16700Schasinglulu uintptr_t base_va); 60*91f16700Schasinglulu int spm_memory_attributes_set_smc_handler(sp_context_t *sp_ctx, 61*91f16700Schasinglulu u_register_t page_address, 62*91f16700Schasinglulu u_register_t pages_count, 63*91f16700Schasinglulu u_register_t smc_attributes); 64*91f16700Schasinglulu 65*91f16700Schasinglulu #endif /* __ASSEMBLER__ */ 66*91f16700Schasinglulu 67*91f16700Schasinglulu #endif /* SPM_MM_PRIVATE_H */ 68