xref: /arm-trusted-firmware/services/std_svc/spm/spm_mm/spm_mm.mk (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu#
2*91f16700Schasinglulu# Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu#
4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu#
6*91f16700Schasinglulu
7*91f16700Schasingluluifneq (${SPD},none)
8*91f16700Schasinglulu        $(error "Error: SPD and SPM_MM are incompatible build options.")
9*91f16700Schasingluluendif
10*91f16700Schasingluluifneq (${ARCH},aarch64)
11*91f16700Schasinglulu        $(error "Error: SPM_MM is only supported on aarch64.")
12*91f16700Schasingluluendif
13*91f16700Schasingluluifneq (${ENABLE_SVE_FOR_NS},0)
14*91f16700Schasinglulu        $(error "Error: SPM_MM is not compatible with ENABLE_SVE_FOR_NS")
15*91f16700Schasingluluendif
16*91f16700Schasingluluifneq (${ENABLE_SME_FOR_NS},0)
17*91f16700Schasinglulu        $(error "Error: SPM_MM is not compatible with ENABLE_SME_FOR_NS")
18*91f16700Schasingluluendif
19*91f16700Schasingluluifeq (${CTX_INCLUDE_FPREGS},0)
20*91f16700Schasinglulu        $(warning "Warning: SPM_MM: CTX_INCLUDE_FPREGS is set to 0")
21*91f16700Schasingluluendif
22*91f16700Schasinglulu
23*91f16700SchasingluluSPM_MM_SOURCES	:=	$(addprefix services/std_svc/spm/spm_mm/,	\
24*91f16700Schasinglulu			spm_mm_main.c					\
25*91f16700Schasinglulu			spm_mm_setup.c					\
26*91f16700Schasinglulu			spm_mm_xlat.c)
27*91f16700Schasinglulu
28*91f16700Schasinglulu
29*91f16700Schasinglulu# Let the top-level Makefile know that we intend to include a BL32 image
30*91f16700SchasingluluNEED_BL32		:=	yes
31*91f16700Schasinglulu
32*91f16700Schasinglulu# required so that SPM code executing at S-EL0 can access the timer registers
33*91f16700SchasingluluNS_TIMER_SWITCH		:=	1
34