1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2022, Arm Limited. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <plat/common/platform.h> 9*91f16700Schasinglulu #include <services/rmmd_svc.h> 10*91f16700Schasinglulu #include "trp_private.h" 11*91f16700Schasinglulu 12*91f16700Schasinglulu /* 13*91f16700Schasinglulu * Per cpu data structure to populate parameters for an SMC in C code and use 14*91f16700Schasinglulu * a pointer to this structure in assembler code to populate x0-x7 15*91f16700Schasinglulu */ 16*91f16700Schasinglulu static trp_args_t trp_smc_args[PLATFORM_CORE_COUNT]; 17*91f16700Schasinglulu 18*91f16700Schasinglulu /* 19*91f16700Schasinglulu * Set the arguments for SMC call 20*91f16700Schasinglulu */ 21*91f16700Schasinglulu trp_args_t *set_smc_args(uint64_t arg0, 22*91f16700Schasinglulu uint64_t arg1, 23*91f16700Schasinglulu uint64_t arg2, 24*91f16700Schasinglulu uint64_t arg3, 25*91f16700Schasinglulu uint64_t arg4, 26*91f16700Schasinglulu uint64_t arg5, 27*91f16700Schasinglulu uint64_t arg6, 28*91f16700Schasinglulu uint64_t arg7) 29*91f16700Schasinglulu { 30*91f16700Schasinglulu uint32_t linear_id; 31*91f16700Schasinglulu trp_args_t *pcpu_smc_args; 32*91f16700Schasinglulu 33*91f16700Schasinglulu /* 34*91f16700Schasinglulu * Return to Secure Monitor by raising an SMC. The results of the 35*91f16700Schasinglulu * service are passed as an arguments to the SMC 36*91f16700Schasinglulu */ 37*91f16700Schasinglulu linear_id = plat_my_core_pos(); 38*91f16700Schasinglulu pcpu_smc_args = &trp_smc_args[linear_id]; 39*91f16700Schasinglulu write_trp_arg(pcpu_smc_args, TRP_ARG0, arg0); 40*91f16700Schasinglulu write_trp_arg(pcpu_smc_args, TRP_ARG1, arg1); 41*91f16700Schasinglulu write_trp_arg(pcpu_smc_args, TRP_ARG2, arg2); 42*91f16700Schasinglulu write_trp_arg(pcpu_smc_args, TRP_ARG3, arg3); 43*91f16700Schasinglulu write_trp_arg(pcpu_smc_args, TRP_ARG4, arg4); 44*91f16700Schasinglulu write_trp_arg(pcpu_smc_args, TRP_ARG5, arg5); 45*91f16700Schasinglulu write_trp_arg(pcpu_smc_args, TRP_ARG6, arg6); 46*91f16700Schasinglulu write_trp_arg(pcpu_smc_args, TRP_ARG7, arg7); 47*91f16700Schasinglulu 48*91f16700Schasinglulu return pcpu_smc_args; 49*91f16700Schasinglulu } 50*91f16700Schasinglulu 51*91f16700Schasinglulu /* 52*91f16700Schasinglulu * Abort the boot process with the reason given in err. 53*91f16700Schasinglulu */ 54*91f16700Schasinglulu __dead2 void trp_boot_abort(uint64_t err) 55*91f16700Schasinglulu { 56*91f16700Schasinglulu (void)trp_smc(set_smc_args(RMM_BOOT_COMPLETE, err, 0, 0, 0, 0, 0, 0)); 57*91f16700Schasinglulu panic(); 58*91f16700Schasinglulu } 59