xref: /arm-trusted-firmware/services/std_svc/rmmd/trp/trp_entry.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu */
6*91f16700Schasinglulu
7*91f16700Schasinglulu#include <asm_macros.S>
8*91f16700Schasinglulu#include <services/rmmd_svc.h>
9*91f16700Schasinglulu
10*91f16700Schasinglulu#include <platform_def.h>
11*91f16700Schasinglulu#include "trp_private.h"
12*91f16700Schasinglulu
13*91f16700Schasinglulu.global trp_head
14*91f16700Schasinglulu.global trp_smc
15*91f16700Schasinglulu
16*91f16700Schasinglulu.section ".head.text", "ax"
17*91f16700Schasinglulu
18*91f16700Schasinglulu	/* ---------------------------------------------
19*91f16700Schasinglulu	 * Populate the params in x0-x7 from the pointer
20*91f16700Schasinglulu	 * to the smc args structure in x0.
21*91f16700Schasinglulu	 * ---------------------------------------------
22*91f16700Schasinglulu	 */
23*91f16700Schasinglulu	.macro restore_args_call_smc
24*91f16700Schasinglulu	ldp	x6, x7, [x0, #TRP_ARG6]
25*91f16700Schasinglulu	ldp	x4, x5, [x0, #TRP_ARG4]
26*91f16700Schasinglulu	ldp	x2, x3, [x0, #TRP_ARG2]
27*91f16700Schasinglulu	ldp	x0, x1, [x0, #TRP_ARG0]
28*91f16700Schasinglulu	smc	#0
29*91f16700Schasinglulu	.endm
30*91f16700Schasinglulu
31*91f16700Schasinglulu	/* ---------------------------------------------
32*91f16700Schasinglulu	 * Entry point for TRP
33*91f16700Schasinglulu	 * ---------------------------------------------
34*91f16700Schasinglulu	 */
35*91f16700Schasinglulutrp_head:
36*91f16700Schasinglulu	/*
37*91f16700Schasinglulu	 * Stash arguments from previous boot stage
38*91f16700Schasinglulu	 */
39*91f16700Schasinglulu	mov	x20, x0
40*91f16700Schasinglulu	mov	x21, x1
41*91f16700Schasinglulu	mov	x22, x2
42*91f16700Schasinglulu	mov	x23, x3
43*91f16700Schasinglulu
44*91f16700Schasinglulu	/*
45*91f16700Schasinglulu	 * Validate CPUId before allocating a stack.
46*91f16700Schasinglulu	 */
47*91f16700Schasinglulu	cmp	x20, #PLATFORM_CORE_COUNT
48*91f16700Schasinglulu	b.lo	1f
49*91f16700Schasinglulu
50*91f16700Schasinglulu	mov_imm	x0, RMM_BOOT_COMPLETE
51*91f16700Schasinglulu	mov_imm	x1, E_RMM_BOOT_CPU_ID_OUT_OF_RANGE
52*91f16700Schasinglulu	smc	#0
53*91f16700Schasinglulu
54*91f16700Schasinglulu	/* EL3 should never return back here, so panic if it does */
55*91f16700Schasinglulu	b	trp_panic
56*91f16700Schasinglulu
57*91f16700Schasinglulu1:
58*91f16700Schasinglulu	bl	plat_set_my_stack
59*91f16700Schasinglulu
60*91f16700Schasinglulu	/*
61*91f16700Schasinglulu	 * Find out whether this is a cold or warm boot
62*91f16700Schasinglulu	 */
63*91f16700Schasinglulu	ldr	x1, cold_boot_flag
64*91f16700Schasinglulu	cbz	x1, warm_boot
65*91f16700Schasinglulu
66*91f16700Schasinglulu	/*
67*91f16700Schasinglulu	 * Update cold boot flag to indicate cold boot is done
68*91f16700Schasinglulu	 */
69*91f16700Schasinglulu	adr	x2, cold_boot_flag
70*91f16700Schasinglulu	str	xzr, [x2]
71*91f16700Schasinglulu
72*91f16700Schasinglulu	/* ---------------------------------------------
73*91f16700Schasinglulu	 * Zero out BSS section
74*91f16700Schasinglulu	 * ---------------------------------------------
75*91f16700Schasinglulu	 */
76*91f16700Schasinglulu	ldr	x0, =__BSS_START__
77*91f16700Schasinglulu	ldr	x1, =__BSS_SIZE__
78*91f16700Schasinglulu	bl	zeromem
79*91f16700Schasinglulu
80*91f16700Schasinglulu	mov	x0, x20
81*91f16700Schasinglulu	mov	x1, x21
82*91f16700Schasinglulu	mov	x2, x22
83*91f16700Schasinglulu	mov	x3, x23
84*91f16700Schasinglulu	bl	trp_setup
85*91f16700Schasinglulu	bl	trp_main
86*91f16700Schasinglulu	b	1f
87*91f16700Schasinglulu
88*91f16700Schasingluluwarm_boot:
89*91f16700Schasinglulu	mov	x0, x20
90*91f16700Schasinglulu	mov	x1, x21
91*91f16700Schasinglulu	mov	x2, x22
92*91f16700Schasinglulu	mov	x3, x23
93*91f16700Schasinglulu	bl	trp_validate_warmboot_args
94*91f16700Schasinglulu	cbnz	x0, trp_panic /* Failed to validate warmboot args */
95*91f16700Schasinglulu
96*91f16700Schasinglulu1:
97*91f16700Schasinglulu	mov_imm	x0, RMM_BOOT_COMPLETE
98*91f16700Schasinglulu	mov	x1, xzr /* RMM_BOOT_SUCCESS */
99*91f16700Schasinglulu	smc	#0
100*91f16700Schasinglulu	b	trp_handler
101*91f16700Schasinglulu
102*91f16700Schasinglulutrp_panic:
103*91f16700Schasinglulu	no_ret plat_panic_handler
104*91f16700Schasinglulu
105*91f16700Schasinglulu	/*
106*91f16700Schasinglulu	 * Flag to mark if it is a cold boot.
107*91f16700Schasinglulu	 * 1: cold boot, 0: warmboot.
108*91f16700Schasinglulu	 */
109*91f16700Schasinglulu.align 3
110*91f16700Schasinglulucold_boot_flag:
111*91f16700Schasinglulu	.dword		1
112*91f16700Schasinglulu
113*91f16700Schasinglulu	/* ---------------------------------------------
114*91f16700Schasinglulu	 *   Direct SMC call to BL31 service provided by
115*91f16700Schasinglulu	 *   RMM Dispatcher
116*91f16700Schasinglulu	 * ---------------------------------------------
117*91f16700Schasinglulu	 */
118*91f16700Schasinglulufunc trp_smc
119*91f16700Schasinglulu	restore_args_call_smc
120*91f16700Schasinglulu	ret
121*91f16700Schasingluluendfunc trp_smc
122*91f16700Schasinglulu
123*91f16700Schasinglulu	/* ---------------------------------------------
124*91f16700Schasinglulu	 * RMI call handler
125*91f16700Schasinglulu	 * ---------------------------------------------
126*91f16700Schasinglulu	 */
127*91f16700Schasinglulufunc trp_handler
128*91f16700Schasinglulu	/*
129*91f16700Schasinglulu	 * Save Link Register and X4, as per SMCCC v1.2 its value
130*91f16700Schasinglulu	 * must be preserved unless it contains result, as specified
131*91f16700Schasinglulu	 * in the function definition.
132*91f16700Schasinglulu	 */
133*91f16700Schasinglulu	stp	x4, lr, [sp, #-16]!
134*91f16700Schasinglulu
135*91f16700Schasinglulu	/*
136*91f16700Schasinglulu	 * Zero the space for X0-X3 in trp_smc_result structure
137*91f16700Schasinglulu	 * and pass its address as the last argument.
138*91f16700Schasinglulu	 */
139*91f16700Schasinglulu	stp	xzr, xzr, [sp, #-16]!
140*91f16700Schasinglulu	stp	xzr, xzr, [sp, #-16]!
141*91f16700Schasinglulu	mov	x7, sp
142*91f16700Schasinglulu
143*91f16700Schasinglulu	bl	trp_rmi_handler
144*91f16700Schasinglulu
145*91f16700Schasinglulu	ldp	x1, x2, [sp], #16
146*91f16700Schasinglulu	ldp	x3, x4, [sp], #16
147*91f16700Schasinglulu	ldp	x5, lr, [sp], #16
148*91f16700Schasinglulu
149*91f16700Schasinglulu	ldr	x0, =RMM_RMI_REQ_COMPLETE
150*91f16700Schasinglulu	smc	#0
151*91f16700Schasinglulu
152*91f16700Schasinglulu	b	trp_handler
153*91f16700Schasingluluendfunc trp_handler
154