1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef RMMD_INITIAL_CONTEXT_H 8*91f16700Schasinglulu #define RMMD_INITIAL_CONTEXT_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <arch.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu /* 13*91f16700Schasinglulu * SPSR_EL2 14*91f16700Schasinglulu * M=0x9 (0b1001 EL2h) 15*91f16700Schasinglulu * M[4]=0 16*91f16700Schasinglulu * DAIF=0xF Exceptions masked on entry. 17*91f16700Schasinglulu * BTYPE=0 BTI not yet supported. 18*91f16700Schasinglulu * SSBS=0 Not yet supported. 19*91f16700Schasinglulu * IL=0 Not an illegal exception return. 20*91f16700Schasinglulu * SS=0 Not single stepping. 21*91f16700Schasinglulu * PAN=1 RMM shouldn't access realm memory. 22*91f16700Schasinglulu * UAO=0 23*91f16700Schasinglulu * DIT=0 24*91f16700Schasinglulu * TCO=0 25*91f16700Schasinglulu * NZCV=0 26*91f16700Schasinglulu */ 27*91f16700Schasinglulu #define REALM_SPSR_EL2 ( \ 28*91f16700Schasinglulu SPSR_M_EL2H | \ 29*91f16700Schasinglulu (0xF << SPSR_DAIF_SHIFT) | \ 30*91f16700Schasinglulu SPSR_PAN_BIT \ 31*91f16700Schasinglulu ) 32*91f16700Schasinglulu 33*91f16700Schasinglulu #endif /* RMMD_INITIAL_CONTEXT_H */ 34