xref: /arm-trusted-firmware/plat/xilinx/zynqmp/platform.mk (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu#
2*91f16700Schasinglulu# Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu# Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
4*91f16700Schasinglulu# Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
5*91f16700Schasinglulu# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
6*91f16700Schasinglulu#
7*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause
8*91f16700Schasinglulu
9*91f16700Schasingluluoverride ERRATA_A53_855873 := 1
10*91f16700SchasingluluERRATA_A53_1530924 := 1
11*91f16700Schasingluluoverride PROGRAMMABLE_RESET_ADDRESS := 1
12*91f16700SchasingluluPSCI_EXTENDED_STATE_ID := 1
13*91f16700SchasingluluA53_DISABLE_NON_TEMPORAL_HINT := 0
14*91f16700SchasingluluSEPARATE_CODE_AND_RODATA := 1
15*91f16700SchasingluluZYNQMP_WDT_RESTART := 0
16*91f16700SchasingluluIPI_CRC_CHECK := 0
17*91f16700Schasingluluoverride RESET_TO_BL31 := 1
18*91f16700Schasingluluoverride WARMBOOT_ENABLE_DCACHE_EARLY := 1
19*91f16700Schasinglulu
20*91f16700SchasingluluEL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
21*91f16700Schasinglulu
22*91f16700Schasinglulu# pncd SPD requires secure SGI to be handled at EL1
23*91f16700Schasingluluifeq (${SPD}, $(filter ${SPD},pncd tspd))
24*91f16700Schasingluluifeq (${ZYNQMP_WDT_RESTART},1)
25*91f16700Schasinglulu$(error "Error: ZYNQMP_WDT_RESTART and SPD=pncd are incompatible")
26*91f16700Schasingluluendif
27*91f16700Schasingluluoverride GICV2_G0_FOR_EL3 := 0
28*91f16700Schasingluluelse
29*91f16700Schasingluluoverride GICV2_G0_FOR_EL3 := 1
30*91f16700Schasingluluendif
31*91f16700Schasinglulu
32*91f16700Schasinglulu# Do not enable SVE
33*91f16700SchasingluluENABLE_SVE_FOR_NS	:= 0
34*91f16700Schasinglulu
35*91f16700SchasingluluWORKAROUND_CVE_2017_5715	:=	0
36*91f16700Schasinglulu
37*91f16700SchasingluluARM_XLAT_TABLES_LIB_V1		:=	1
38*91f16700Schasinglulu$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
39*91f16700Schasinglulu$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
40*91f16700Schasinglulu
41*91f16700Schasingluluifdef ZYNQMP_ATF_MEM_BASE
42*91f16700Schasinglulu    $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE))
43*91f16700Schasinglulu
44*91f16700Schasinglulu    ifndef ZYNQMP_ATF_MEM_SIZE
45*91f16700Schasinglulu        $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE")
46*91f16700Schasinglulu    endif
47*91f16700Schasinglulu    $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE))
48*91f16700Schasinglulu
49*91f16700Schasinglulu    ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE
50*91f16700Schasinglulu        $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE))
51*91f16700Schasinglulu    endif
52*91f16700Schasinglulu
53*91f16700Schasinglulu    # enable assert() when TF-A runs from DDR memory.
54*91f16700Schasinglulu    ENABLE_ASSERTIONS := 1
55*91f16700Schasinglulu
56*91f16700Schasingluluendif
57*91f16700Schasinglulu
58*91f16700Schasingluluifdef ZYNQMP_BL32_MEM_BASE
59*91f16700Schasinglulu    $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE))
60*91f16700Schasinglulu
61*91f16700Schasinglulu    ifndef ZYNQMP_BL32_MEM_SIZE
62*91f16700Schasinglulu        $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE")
63*91f16700Schasinglulu    endif
64*91f16700Schasinglulu    $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
65*91f16700Schasingluluendif
66*91f16700Schasinglulu
67*91f16700Schasinglulu
68*91f16700Schasingluluifdef ZYNQMP_WDT_RESTART
69*91f16700Schasinglulu    $(eval $(call add_define,ZYNQMP_WDT_RESTART))
70*91f16700Schasingluluendif
71*91f16700Schasinglulu
72*91f16700Schasingluluifdef ZYNQMP_IPI_CRC_CHECK
73*91f16700Schasinglulu    $(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.")
74*91f16700Schasingluluendif
75*91f16700Schasinglulu
76*91f16700Schasingluluifdef IPI_CRC_CHECK
77*91f16700Schasinglulu    $(eval $(call add_define,IPI_CRC_CHECK))
78*91f16700Schasingluluendif
79*91f16700Schasinglulu
80*91f16700Schasingluluifdef ZYNQMP_SECURE_EFUSES
81*91f16700Schasinglulu    $(eval $(call add_define,ZYNQMP_SECURE_EFUSES))
82*91f16700Schasingluluendif
83*91f16700Schasinglulu
84*91f16700Schasingluluifdef XILINX_OF_BOARD_DTB_ADDR
85*91f16700Schasinglulu$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
86*91f16700Schasingluluendif
87*91f16700Schasinglulu
88*91f16700SchasingluluPLAT_INCLUDES		:=	-Iinclude/plat/arm/common/			\
89*91f16700Schasinglulu				-Iinclude/plat/arm/common/aarch64/		\
90*91f16700Schasinglulu				-Iplat/xilinx/common/include/			\
91*91f16700Schasinglulu				-Iplat/xilinx/common/ipi_mailbox_service/	\
92*91f16700Schasinglulu				-Iplat/xilinx/zynqmp/include/			\
93*91f16700Schasinglulu				-Iplat/xilinx/zynqmp/pm_service/		\
94*91f16700Schasinglulu
95*91f16700Schasingluluinclude lib/libfdt/libfdt.mk
96*91f16700Schasinglulu# Include GICv2 driver files
97*91f16700Schasingluluinclude drivers/arm/gic/v2/gicv2.mk
98*91f16700Schasinglulu
99*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	:=	lib/xlat_tables/xlat_tables_common.c		\
100*91f16700Schasinglulu				lib/xlat_tables/aarch64/xlat_tables.c		\
101*91f16700Schasinglulu				drivers/arm/dcc/dcc_console.c			\
102*91f16700Schasinglulu				drivers/delay_timer/delay_timer.c		\
103*91f16700Schasinglulu				drivers/delay_timer/generic_delay_timer.c	\
104*91f16700Schasinglulu				${GICV2_SOURCES}				\
105*91f16700Schasinglulu				drivers/cadence/uart/aarch64/cdns_console.S	\
106*91f16700Schasinglulu				plat/arm/common/arm_cci.c			\
107*91f16700Schasinglulu				plat/arm/common/arm_common.c			\
108*91f16700Schasinglulu				plat/arm/common/arm_gicv2.c			\
109*91f16700Schasinglulu				plat/common/plat_gicv2.c			\
110*91f16700Schasinglulu				plat/xilinx/common/ipi.c			\
111*91f16700Schasinglulu				plat/xilinx/zynqmp/zynqmp_ipi.c			\
112*91f16700Schasinglulu				plat/common/aarch64/crash_console_helpers.S	\
113*91f16700Schasinglulu				plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S	\
114*91f16700Schasinglulu				plat/xilinx/zynqmp/aarch64/zynqmp_common.c
115*91f16700Schasinglulu
116*91f16700SchasingluluZYNQMP_CONSOLE	?=	cadence
117*91f16700Schasingluluifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc))
118*91f16700Schasingluluelse
119*91f16700Schasinglulu  $(error "Please define ZYNQMP_CONSOLE")
120*91f16700Schasingluluendif
121*91f16700Schasinglulu$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE}))
122*91f16700Schasinglulu
123*91f16700Schasinglulu# Build PM code as a Library
124*91f16700Schasingluluinclude plat/xilinx/zynqmp/libpm.mk
125*91f16700Schasinglulu
126*91f16700SchasingluluBL31_SOURCES		+=	drivers/arm/cci/cci.c				\
127*91f16700Schasinglulu				lib/cpus/aarch64/aem_generic.S			\
128*91f16700Schasinglulu				lib/cpus/aarch64/cortex_a53.S			\
129*91f16700Schasinglulu				plat/common/plat_psci_common.c			\
130*91f16700Schasinglulu				common/fdt_fixup.c				\
131*91f16700Schasinglulu				common/fdt_wrappers.c				\
132*91f16700Schasinglulu				${LIBFDT_SRCS}					\
133*91f16700Schasinglulu				plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
134*91f16700Schasinglulu				plat/xilinx/common/plat_startup.c		\
135*91f16700Schasinglulu				plat/xilinx/common/plat_console.c		\
136*91f16700Schasinglulu				plat/xilinx/common/plat_fdt.c			\
137*91f16700Schasinglulu				plat/xilinx/zynqmp/bl31_zynqmp_setup.c		\
138*91f16700Schasinglulu				plat/xilinx/zynqmp/plat_psci.c			\
139*91f16700Schasinglulu				plat/xilinx/zynqmp/plat_zynqmp.c		\
140*91f16700Schasinglulu				plat/xilinx/zynqmp/plat_topology.c		\
141*91f16700Schasinglulu				plat/xilinx/zynqmp/sip_svc_setup.c
142*91f16700Schasinglulu
143*91f16700Schasingluluifeq (${SDEI_SUPPORT},1)
144*91f16700SchasingluluBL31_SOURCES		+=	plat/xilinx/zynqmp/zynqmp_ehf.c			\
145*91f16700Schasinglulu				plat/xilinx/zynqmp/zynqmp_sdei.c
146*91f16700Schasingluluendif
147*91f16700Schasinglulu
148*91f16700SchasingluluBL31_CPPFLAGS		+=	-fno-jump-tables
149*91f16700SchasingluluTF_CFLAGS_aarch64	+=	-mbranch-protection=none
150*91f16700Schasinglulu
151*91f16700Schasingluluifdef CUSTOM_PKG_PATH
152*91f16700Schasingluluinclude $(CUSTOM_PKG_PATH)/custom_pkg.mk
153*91f16700Schasingluluelse
154*91f16700SchasingluluBL31_SOURCES		+=	plat/xilinx/zynqmp/custom_sip_svc.c
155*91f16700Schasingluluendif
156*91f16700Schasinglulu
157*91f16700Schasingluluifneq (${RESET_TO_BL31},1)
158*91f16700Schasinglulu  $(error "Using BL31 as the reset vector is only one option supported on ZynqMP. Please set RESET_TO_BL31 to 1.")
159*91f16700Schasingluluendif
160