1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2014-2018, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu#ifndef PLAT_MACROS_S 7*91f16700Schasinglulu#define PLAT_MACROS_S 8*91f16700Schasinglulu 9*91f16700Schasinglulu#include <arm_macros.S> 10*91f16700Schasinglulu#include <cci_macros.S> 11*91f16700Schasinglulu#include "zynqmp_def.h" 12*91f16700Schasinglulu 13*91f16700Schasinglulu /* --------------------------------------------- 14*91f16700Schasinglulu * The below required platform porting macro 15*91f16700Schasinglulu * prints out relevant GIC and CCI registers 16*91f16700Schasinglulu * whenever an unhandled exception is taken in 17*91f16700Schasinglulu * BL31. 18*91f16700Schasinglulu * Clobbers: x0 - x10, x16, x17, sp 19*91f16700Schasinglulu * --------------------------------------------- 20*91f16700Schasinglulu */ 21*91f16700Schasinglulu .macro plat_crash_print_regs 22*91f16700Schasinglulu mov_imm x17, BASE_GICC_BASE 23*91f16700Schasinglulu mov_imm x16, BASE_GICD_BASE 24*91f16700Schasinglulu arm_print_gic_regs 25*91f16700Schasinglulu print_cci_regs 26*91f16700Schasinglulu .endm 27*91f16700Schasinglulu 28*91f16700Schasinglulu#endif /* PLAT_MACROS_S */ 29