1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 4*91f16700Schasinglulu * 5*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <assert.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <common/debug.h> 11*91f16700Schasinglulu #include <lib/mmio.h> 12*91f16700Schasinglulu #include <lib/psci/psci.h> 13*91f16700Schasinglulu #include <plat/arm/common/plat_arm.h> 14*91f16700Schasinglulu #include <plat/common/platform.h> 15*91f16700Schasinglulu #include <plat_arm.h> 16*91f16700Schasinglulu 17*91f16700Schasinglulu #include <plat_private.h> 18*91f16700Schasinglulu #include "pm_api_sys.h" 19*91f16700Schasinglulu #include "pm_client.h" 20*91f16700Schasinglulu #include <pm_common.h> 21*91f16700Schasinglulu 22*91f16700Schasinglulu static uintptr_t versal_sec_entry; 23*91f16700Schasinglulu 24*91f16700Schasinglulu static int32_t versal_pwr_domain_on(u_register_t mpidr) 25*91f16700Schasinglulu { 26*91f16700Schasinglulu int32_t cpu_id = plat_core_pos_by_mpidr(mpidr); 27*91f16700Schasinglulu const struct pm_proc *proc; 28*91f16700Schasinglulu 29*91f16700Schasinglulu VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr); 30*91f16700Schasinglulu 31*91f16700Schasinglulu if (cpu_id == -1) { 32*91f16700Schasinglulu return PSCI_E_INTERN_FAIL; 33*91f16700Schasinglulu } 34*91f16700Schasinglulu 35*91f16700Schasinglulu proc = pm_get_proc((uint32_t)cpu_id); 36*91f16700Schasinglulu 37*91f16700Schasinglulu /* Send request to PMC to wake up selected ACPU core */ 38*91f16700Schasinglulu (void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U, 39*91f16700Schasinglulu versal_sec_entry >> 32, 0, SECURE_FLAG); 40*91f16700Schasinglulu 41*91f16700Schasinglulu /* Clear power down request */ 42*91f16700Schasinglulu pm_client_wakeup(proc); 43*91f16700Schasinglulu 44*91f16700Schasinglulu return PSCI_E_SUCCESS; 45*91f16700Schasinglulu } 46*91f16700Schasinglulu 47*91f16700Schasinglulu /** 48*91f16700Schasinglulu * versal_pwr_domain_suspend() - This function sends request to PMC to suspend 49*91f16700Schasinglulu * core. 50*91f16700Schasinglulu * @target_state: Targated state. 51*91f16700Schasinglulu * 52*91f16700Schasinglulu */ 53*91f16700Schasinglulu static void versal_pwr_domain_suspend(const psci_power_state_t *target_state) 54*91f16700Schasinglulu { 55*91f16700Schasinglulu uint32_t state; 56*91f16700Schasinglulu uint32_t cpu_id = plat_my_core_pos(); 57*91f16700Schasinglulu const struct pm_proc *proc = pm_get_proc(cpu_id); 58*91f16700Schasinglulu 59*91f16700Schasinglulu for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { 60*91f16700Schasinglulu VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 61*91f16700Schasinglulu __func__, i, target_state->pwr_domain_state[i]); 62*91f16700Schasinglulu } 63*91f16700Schasinglulu 64*91f16700Schasinglulu plat_versal_gic_cpuif_disable(); 65*91f16700Schasinglulu 66*91f16700Schasinglulu if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 67*91f16700Schasinglulu plat_versal_gic_save(); 68*91f16700Schasinglulu } 69*91f16700Schasinglulu 70*91f16700Schasinglulu state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? 71*91f16700Schasinglulu PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE; 72*91f16700Schasinglulu 73*91f16700Schasinglulu /* Send request to PMC to suspend this core */ 74*91f16700Schasinglulu (void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry, 75*91f16700Schasinglulu SECURE_FLAG); 76*91f16700Schasinglulu 77*91f16700Schasinglulu /* APU is to be turned off */ 78*91f16700Schasinglulu if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 79*91f16700Schasinglulu /* disable coherency */ 80*91f16700Schasinglulu plat_arm_interconnect_exit_coherency(); 81*91f16700Schasinglulu } 82*91f16700Schasinglulu } 83*91f16700Schasinglulu 84*91f16700Schasinglulu /** 85*91f16700Schasinglulu * versal_pwr_domain_suspend_finish() - This function performs actions to finish 86*91f16700Schasinglulu * suspend procedure. 87*91f16700Schasinglulu * @target_state: Targated state. 88*91f16700Schasinglulu * 89*91f16700Schasinglulu */ 90*91f16700Schasinglulu static void versal_pwr_domain_suspend_finish( 91*91f16700Schasinglulu const psci_power_state_t *target_state) 92*91f16700Schasinglulu { 93*91f16700Schasinglulu uint32_t cpu_id = plat_my_core_pos(); 94*91f16700Schasinglulu const struct pm_proc *proc = pm_get_proc(cpu_id); 95*91f16700Schasinglulu 96*91f16700Schasinglulu for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { 97*91f16700Schasinglulu VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 98*91f16700Schasinglulu __func__, i, target_state->pwr_domain_state[i]); 99*91f16700Schasinglulu } 100*91f16700Schasinglulu 101*91f16700Schasinglulu /* Clear the APU power control register for this cpu */ 102*91f16700Schasinglulu pm_client_wakeup(proc); 103*91f16700Schasinglulu 104*91f16700Schasinglulu /* enable coherency */ 105*91f16700Schasinglulu plat_arm_interconnect_enter_coherency(); 106*91f16700Schasinglulu 107*91f16700Schasinglulu /* APU was turned off, so restore GIC context */ 108*91f16700Schasinglulu if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 109*91f16700Schasinglulu plat_versal_gic_resume(); 110*91f16700Schasinglulu } 111*91f16700Schasinglulu 112*91f16700Schasinglulu plat_versal_gic_cpuif_enable(); 113*91f16700Schasinglulu } 114*91f16700Schasinglulu 115*91f16700Schasinglulu void versal_pwr_domain_on_finish(const psci_power_state_t *target_state) 116*91f16700Schasinglulu { 117*91f16700Schasinglulu /* Enable the gic cpu interface */ 118*91f16700Schasinglulu plat_versal_gic_pcpu_init(); 119*91f16700Schasinglulu 120*91f16700Schasinglulu /* Program the gic per-cpu distributor or re-distributor interface */ 121*91f16700Schasinglulu plat_versal_gic_cpuif_enable(); 122*91f16700Schasinglulu } 123*91f16700Schasinglulu 124*91f16700Schasinglulu /** 125*91f16700Schasinglulu * versal_system_off() - This function sends the system off request to firmware. 126*91f16700Schasinglulu * This function does not return. 127*91f16700Schasinglulu * 128*91f16700Schasinglulu */ 129*91f16700Schasinglulu static void __dead2 versal_system_off(void) 130*91f16700Schasinglulu { 131*91f16700Schasinglulu /* Send the power down request to the PMC */ 132*91f16700Schasinglulu (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN, 133*91f16700Schasinglulu pm_get_shutdown_scope(), SECURE_FLAG); 134*91f16700Schasinglulu 135*91f16700Schasinglulu while (1) { 136*91f16700Schasinglulu wfi(); 137*91f16700Schasinglulu } 138*91f16700Schasinglulu } 139*91f16700Schasinglulu 140*91f16700Schasinglulu /** 141*91f16700Schasinglulu * versal_system_reset() - This function sends the reset request to firmware 142*91f16700Schasinglulu * for the system to reset. This function does not 143*91f16700Schasinglulu * return. 144*91f16700Schasinglulu * 145*91f16700Schasinglulu */ 146*91f16700Schasinglulu static void __dead2 versal_system_reset(void) 147*91f16700Schasinglulu { 148*91f16700Schasinglulu /* Send the system reset request to the PMC */ 149*91f16700Schasinglulu (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET, 150*91f16700Schasinglulu pm_get_shutdown_scope(), SECURE_FLAG); 151*91f16700Schasinglulu 152*91f16700Schasinglulu while (1) { 153*91f16700Schasinglulu wfi(); 154*91f16700Schasinglulu } 155*91f16700Schasinglulu } 156*91f16700Schasinglulu 157*91f16700Schasinglulu /** 158*91f16700Schasinglulu * versal_pwr_domain_off() - This function performs actions to turn off core. 159*91f16700Schasinglulu * @target_state: Targated state. 160*91f16700Schasinglulu * 161*91f16700Schasinglulu */ 162*91f16700Schasinglulu static void versal_pwr_domain_off(const psci_power_state_t *target_state) 163*91f16700Schasinglulu { 164*91f16700Schasinglulu uint32_t cpu_id = plat_my_core_pos(); 165*91f16700Schasinglulu const struct pm_proc *proc = pm_get_proc(cpu_id); 166*91f16700Schasinglulu 167*91f16700Schasinglulu for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { 168*91f16700Schasinglulu VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 169*91f16700Schasinglulu __func__, i, target_state->pwr_domain_state[i]); 170*91f16700Schasinglulu } 171*91f16700Schasinglulu 172*91f16700Schasinglulu /* Prevent interrupts from spuriously waking up this cpu */ 173*91f16700Schasinglulu plat_versal_gic_cpuif_disable(); 174*91f16700Schasinglulu 175*91f16700Schasinglulu /* 176*91f16700Schasinglulu * Send request to PMC to power down the appropriate APU CPU 177*91f16700Schasinglulu * core. 178*91f16700Schasinglulu * According to PSCI specification, CPU_off function does not 179*91f16700Schasinglulu * have resume address and CPU core can only be woken up 180*91f16700Schasinglulu * invoking CPU_on function, during which resume address will 181*91f16700Schasinglulu * be set. 182*91f16700Schasinglulu */ 183*91f16700Schasinglulu (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0, 184*91f16700Schasinglulu SECURE_FLAG); 185*91f16700Schasinglulu } 186*91f16700Schasinglulu 187*91f16700Schasinglulu /** 188*91f16700Schasinglulu * versal_validate_power_state() - This function ensures that the power state 189*91f16700Schasinglulu * parameter in request is valid. 190*91f16700Schasinglulu * @power_state: Power state of core. 191*91f16700Schasinglulu * @req_state: Requested state. 192*91f16700Schasinglulu * 193*91f16700Schasinglulu * Return: Returns status, either success or reason. 194*91f16700Schasinglulu * 195*91f16700Schasinglulu */ 196*91f16700Schasinglulu static int32_t versal_validate_power_state(uint32_t power_state, 197*91f16700Schasinglulu psci_power_state_t *req_state) 198*91f16700Schasinglulu { 199*91f16700Schasinglulu VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); 200*91f16700Schasinglulu 201*91f16700Schasinglulu uint32_t pstate = psci_get_pstate_type(power_state); 202*91f16700Schasinglulu 203*91f16700Schasinglulu assert(req_state); 204*91f16700Schasinglulu 205*91f16700Schasinglulu /* Sanity check the requested state */ 206*91f16700Schasinglulu if (pstate == PSTATE_TYPE_STANDBY) { 207*91f16700Schasinglulu req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; 208*91f16700Schasinglulu } else { 209*91f16700Schasinglulu req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; 210*91f16700Schasinglulu } 211*91f16700Schasinglulu 212*91f16700Schasinglulu /* We expect the 'state id' to be zero */ 213*91f16700Schasinglulu if (psci_get_pstate_id(power_state) != 0U) { 214*91f16700Schasinglulu return PSCI_E_INVALID_PARAMS; 215*91f16700Schasinglulu } 216*91f16700Schasinglulu 217*91f16700Schasinglulu return PSCI_E_SUCCESS; 218*91f16700Schasinglulu } 219*91f16700Schasinglulu 220*91f16700Schasinglulu /** 221*91f16700Schasinglulu * versal_get_sys_suspend_power_state() - Get power state for system suspend. 222*91f16700Schasinglulu * @req_state: Requested state. 223*91f16700Schasinglulu * 224*91f16700Schasinglulu */ 225*91f16700Schasinglulu static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state) 226*91f16700Schasinglulu { 227*91f16700Schasinglulu req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; 228*91f16700Schasinglulu req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; 229*91f16700Schasinglulu } 230*91f16700Schasinglulu 231*91f16700Schasinglulu static const struct plat_psci_ops versal_nopmc_psci_ops = { 232*91f16700Schasinglulu .pwr_domain_on = versal_pwr_domain_on, 233*91f16700Schasinglulu .pwr_domain_off = versal_pwr_domain_off, 234*91f16700Schasinglulu .pwr_domain_on_finish = versal_pwr_domain_on_finish, 235*91f16700Schasinglulu .pwr_domain_suspend = versal_pwr_domain_suspend, 236*91f16700Schasinglulu .pwr_domain_suspend_finish = versal_pwr_domain_suspend_finish, 237*91f16700Schasinglulu .system_off = versal_system_off, 238*91f16700Schasinglulu .system_reset = versal_system_reset, 239*91f16700Schasinglulu .validate_power_state = versal_validate_power_state, 240*91f16700Schasinglulu .get_sys_suspend_power_state = versal_get_sys_suspend_power_state, 241*91f16700Schasinglulu }; 242*91f16700Schasinglulu 243*91f16700Schasinglulu /******************************************************************************* 244*91f16700Schasinglulu * Export the platform specific power ops. 245*91f16700Schasinglulu ******************************************************************************/ 246*91f16700Schasinglulu int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint, 247*91f16700Schasinglulu const struct plat_psci_ops **psci_ops) 248*91f16700Schasinglulu { 249*91f16700Schasinglulu versal_sec_entry = sec_entrypoint; 250*91f16700Schasinglulu 251*91f16700Schasinglulu *psci_ops = &versal_nopmc_psci_ops; 252*91f16700Schasinglulu 253*91f16700Schasinglulu return 0; 254*91f16700Schasinglulu } 255