1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2018-2019, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. 4*91f16700Schasinglulu * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 5*91f16700Schasinglulu * 6*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 7*91f16700Schasinglulu */ 8*91f16700Schasinglulu 9*91f16700Schasinglulu #ifndef PLAT_PRIVATE_H 10*91f16700Schasinglulu #define PLAT_PRIVATE_H 11*91f16700Schasinglulu 12*91f16700Schasinglulu #include <bl31/interrupt_mgmt.h> 13*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_v2.h> 14*91f16700Schasinglulu 15*91f16700Schasinglulu typedef struct versal_intr_info_type_el3 { 16*91f16700Schasinglulu uint32_t id; 17*91f16700Schasinglulu interrupt_type_handler_t handler; 18*91f16700Schasinglulu } versal_intr_info_type_el3_t; 19*91f16700Schasinglulu 20*91f16700Schasinglulu uint32_t get_uart_clk(void); 21*91f16700Schasinglulu void versal_config_setup(void); 22*91f16700Schasinglulu 23*91f16700Schasinglulu const mmap_region_t *plat_get_mmap(void); 24*91f16700Schasinglulu 25*91f16700Schasinglulu extern uint32_t platform_id, platform_version; 26*91f16700Schasinglulu 27*91f16700Schasinglulu void board_detection(void); 28*91f16700Schasinglulu void plat_versal_gic_driver_init(void); 29*91f16700Schasinglulu void plat_versal_gic_init(void); 30*91f16700Schasinglulu void plat_versal_gic_cpuif_enable(void); 31*91f16700Schasinglulu void plat_versal_gic_cpuif_disable(void); 32*91f16700Schasinglulu void plat_versal_gic_pcpu_init(void); 33*91f16700Schasinglulu void plat_versal_gic_save(void); 34*91f16700Schasinglulu void plat_versal_gic_resume(void); 35*91f16700Schasinglulu 36*91f16700Schasinglulu uint32_t versal_calc_core_pos(u_register_t mpidr); 37*91f16700Schasinglulu /* 38*91f16700Schasinglulu * Register handler to specific GIC entrance 39*91f16700Schasinglulu * for INTR_TYPE_EL3 type of interrupt 40*91f16700Schasinglulu */ 41*91f16700Schasinglulu int32_t request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler); 42*91f16700Schasinglulu 43*91f16700Schasinglulu #endif /* PLAT_PRIVATE_H */ 44