xref: /arm-trusted-firmware/plat/xilinx/common/plat_startup.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2014-2020, Arm Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
4*91f16700Schasinglulu  *
5*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
6*91f16700Schasinglulu  */
7*91f16700Schasinglulu 
8*91f16700Schasinglulu #include <assert.h>
9*91f16700Schasinglulu #include <inttypes.h>
10*91f16700Schasinglulu #include <stdint.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu #include <arch_helpers.h>
13*91f16700Schasinglulu #include <common/debug.h>
14*91f16700Schasinglulu #include <plat_startup.h>
15*91f16700Schasinglulu 
16*91f16700Schasinglulu 
17*91f16700Schasinglulu /*
18*91f16700Schasinglulu  * HandoffParams
19*91f16700Schasinglulu  * Parameter		bitfield	encoding
20*91f16700Schasinglulu  * -----------------------------------------------------------------------------
21*91f16700Schasinglulu  * Exec State		0		0 -> Aarch64, 1-> Aarch32
22*91f16700Schasinglulu  * endianness		1		0 -> LE, 1 -> BE
23*91f16700Schasinglulu  * secure (TZ)		2		0 -> Non secure, 1 -> secure
24*91f16700Schasinglulu  * EL			3:4		00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3
25*91f16700Schasinglulu  * CPU#			5:6		00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3
26*91f16700Schasinglulu  * Reserved		7:10		Reserved
27*91f16700Schasinglulu  * Cluster#		11:12		00 -> Cluster 0, 01 -> Cluster 1, 10 -> Cluster 2,
28*91f16700Schasinglulu  *					11 -> Cluster (Applicable for Versal NET only).
29*91f16700Schasinglulu  * Reserved		13:16		Reserved
30*91f16700Schasinglulu  */
31*91f16700Schasinglulu 
32*91f16700Schasinglulu #define XBL_FLAGS_ESTATE_SHIFT		0U
33*91f16700Schasinglulu #define XBL_FLAGS_ESTATE_MASK		(1U << XBL_FLAGS_ESTATE_SHIFT)
34*91f16700Schasinglulu #define XBL_FLAGS_ESTATE_A64		0U
35*91f16700Schasinglulu #define XBL_FLAGS_ESTATE_A32		1U
36*91f16700Schasinglulu 
37*91f16700Schasinglulu #define XBL_FLAGS_ENDIAN_SHIFT		1U
38*91f16700Schasinglulu #define XBL_FLAGS_ENDIAN_MASK		(1U << XBL_FLAGS_ENDIAN_SHIFT)
39*91f16700Schasinglulu #define XBL_FLAGS_ENDIAN_LE		0U
40*91f16700Schasinglulu #define XBL_FLAGS_ENDIAN_BE		1U
41*91f16700Schasinglulu 
42*91f16700Schasinglulu #define XBL_FLAGS_TZ_SHIFT		2U
43*91f16700Schasinglulu #define XBL_FLAGS_TZ_MASK		(1U << XBL_FLAGS_TZ_SHIFT)
44*91f16700Schasinglulu #define XBL_FLAGS_NON_SECURE		0U
45*91f16700Schasinglulu #define XBL_FLAGS_SECURE		1U
46*91f16700Schasinglulu 
47*91f16700Schasinglulu #define XBL_FLAGS_EL_SHIFT		3U
48*91f16700Schasinglulu #define XBL_FLAGS_EL_MASK		(3U << XBL_FLAGS_EL_SHIFT)
49*91f16700Schasinglulu #define XBL_FLAGS_EL0			0U
50*91f16700Schasinglulu #define XBL_FLAGS_EL1			1U
51*91f16700Schasinglulu #define XBL_FLAGS_EL2			2U
52*91f16700Schasinglulu #define XBL_FLAGS_EL3			3U
53*91f16700Schasinglulu 
54*91f16700Schasinglulu #define XBL_FLAGS_CPU_SHIFT		5U
55*91f16700Schasinglulu #define XBL_FLAGS_CPU_MASK		(3U << XBL_FLAGS_CPU_SHIFT)
56*91f16700Schasinglulu #define XBL_FLAGS_A53_0		0U
57*91f16700Schasinglulu #define XBL_FLAGS_A53_1		1U
58*91f16700Schasinglulu #define XBL_FLAGS_A53_2		2U
59*91f16700Schasinglulu #define XBL_FLAGS_A53_3		3U
60*91f16700Schasinglulu 
61*91f16700Schasinglulu #if defined(PLAT_versal_net)
62*91f16700Schasinglulu #define XBL_FLAGS_CLUSTER_SHIFT		11U
63*91f16700Schasinglulu #define XBL_FLAGS_CLUSTER_MASK		GENMASK(11, 12)
64*91f16700Schasinglulu 
65*91f16700Schasinglulu #define XBL_FLAGS_CLUSTER_0		0U
66*91f16700Schasinglulu #endif /* PLAT_versal_net */
67*91f16700Schasinglulu 
68*91f16700Schasinglulu /**
69*91f16700Schasinglulu  * get_xbl_cpu() - Get the target CPU for partition.
70*91f16700Schasinglulu  * @partition: Pointer to partition struct.
71*91f16700Schasinglulu  *
72*91f16700Schasinglulu  * Return: XBL_FLAGS_A53_0, XBL_FLAGS_A53_1, XBL_FLAGS_A53_2 or XBL_FLAGS_A53_3.
73*91f16700Schasinglulu  *
74*91f16700Schasinglulu  */
75*91f16700Schasinglulu static int32_t get_xbl_cpu(const struct xbl_partition *partition)
76*91f16700Schasinglulu {
77*91f16700Schasinglulu 	uint64_t flags = partition->flags & XBL_FLAGS_CPU_MASK;
78*91f16700Schasinglulu 
79*91f16700Schasinglulu 	return flags >> XBL_FLAGS_CPU_SHIFT;
80*91f16700Schasinglulu }
81*91f16700Schasinglulu 
82*91f16700Schasinglulu /**
83*91f16700Schasinglulu  * get_xbl_el() - Get the target exception level for partition.
84*91f16700Schasinglulu  * @partition: Pointer to partition struct.
85*91f16700Schasinglulu  *
86*91f16700Schasinglulu  * Return: XBL_FLAGS_EL0, XBL_FLAGS_EL1, XBL_FLAGS_EL2 or XBL_FLAGS_EL3.
87*91f16700Schasinglulu  *
88*91f16700Schasinglulu  */
89*91f16700Schasinglulu static int32_t get_xbl_el(const struct xbl_partition *partition)
90*91f16700Schasinglulu {
91*91f16700Schasinglulu 	uint64_t flags = partition->flags & XBL_FLAGS_EL_MASK;
92*91f16700Schasinglulu 
93*91f16700Schasinglulu 	return flags >> XBL_FLAGS_EL_SHIFT;
94*91f16700Schasinglulu }
95*91f16700Schasinglulu 
96*91f16700Schasinglulu /**
97*91f16700Schasinglulu  * get_xbl_ss() - Get the target security state for partition.
98*91f16700Schasinglulu  * @partition: Pointer to partition struct.
99*91f16700Schasinglulu  *
100*91f16700Schasinglulu  * Return: XBL_FLAGS_NON_SECURE or XBL_FLAGS_SECURE.
101*91f16700Schasinglulu  *
102*91f16700Schasinglulu  */
103*91f16700Schasinglulu static int32_t get_xbl_ss(const struct xbl_partition *partition)
104*91f16700Schasinglulu {
105*91f16700Schasinglulu 	uint64_t flags = partition->flags & XBL_FLAGS_TZ_MASK;
106*91f16700Schasinglulu 
107*91f16700Schasinglulu 	return flags >> XBL_FLAGS_TZ_SHIFT;
108*91f16700Schasinglulu }
109*91f16700Schasinglulu 
110*91f16700Schasinglulu /**
111*91f16700Schasinglulu  * get_xbl_endian() - Get the target endianness for partition.
112*91f16700Schasinglulu  * @partition: Pointer to partition struct.
113*91f16700Schasinglulu  *
114*91f16700Schasinglulu  * Return: SPSR_E_LITTLE or SPSR_E_BIG.
115*91f16700Schasinglulu  *
116*91f16700Schasinglulu  */
117*91f16700Schasinglulu static int32_t get_xbl_endian(const struct xbl_partition *partition)
118*91f16700Schasinglulu {
119*91f16700Schasinglulu 	uint64_t flags = partition->flags & XBL_FLAGS_ENDIAN_MASK;
120*91f16700Schasinglulu 
121*91f16700Schasinglulu 	flags >>= XBL_FLAGS_ENDIAN_SHIFT;
122*91f16700Schasinglulu 
123*91f16700Schasinglulu 	if (flags == XBL_FLAGS_ENDIAN_BE) {
124*91f16700Schasinglulu 		return SPSR_E_BIG;
125*91f16700Schasinglulu 	} else {
126*91f16700Schasinglulu 		return SPSR_E_LITTLE;
127*91f16700Schasinglulu 	}
128*91f16700Schasinglulu }
129*91f16700Schasinglulu 
130*91f16700Schasinglulu /**
131*91f16700Schasinglulu  * get_xbl_estate() - Get the target execution state for partition.
132*91f16700Schasinglulu  * @partition: Pointer to partition struct.
133*91f16700Schasinglulu  *
134*91f16700Schasinglulu  * Return: XBL_FLAGS_ESTATE_A32 or XBL_FLAGS_ESTATE_A64.
135*91f16700Schasinglulu  *
136*91f16700Schasinglulu  */
137*91f16700Schasinglulu static int32_t get_xbl_estate(const struct xbl_partition *partition)
138*91f16700Schasinglulu {
139*91f16700Schasinglulu 	uint64_t flags = partition->flags & XBL_FLAGS_ESTATE_MASK;
140*91f16700Schasinglulu 
141*91f16700Schasinglulu 	return flags >> XBL_FLAGS_ESTATE_SHIFT;
142*91f16700Schasinglulu }
143*91f16700Schasinglulu 
144*91f16700Schasinglulu #if defined(PLAT_versal_net)
145*91f16700Schasinglulu /**
146*91f16700Schasinglulu  * get_xbl_cluster - Get the cluster number
147*91f16700Schasinglulu  * @partition: pointer to the partition structure.
148*91f16700Schasinglulu  *
149*91f16700Schasinglulu  * Return: cluster number for the partition.
150*91f16700Schasinglulu  */
151*91f16700Schasinglulu static int32_t get_xbl_cluster(const struct xbl_partition *partition)
152*91f16700Schasinglulu {
153*91f16700Schasinglulu 	uint64_t flags = partition->flags & XBL_FLAGS_CLUSTER_MASK;
154*91f16700Schasinglulu 
155*91f16700Schasinglulu 	return (int32_t)(flags >> XBL_FLAGS_CLUSTER_SHIFT);
156*91f16700Schasinglulu }
157*91f16700Schasinglulu #endif /* PLAT_versal_net */
158*91f16700Schasinglulu 
159*91f16700Schasinglulu /**
160*91f16700Schasinglulu  * xbl_handover() - Populates the bl32 and bl33 image info structures.
161*91f16700Schasinglulu  * @bl32: BL32 image info structure.
162*91f16700Schasinglulu  * @bl33: BL33 image info structure.
163*91f16700Schasinglulu  * @handoff_addr: TF-A handoff address.
164*91f16700Schasinglulu  *
165*91f16700Schasinglulu  * Process the handoff parameters from the XBL and populate the BL32 and BL33
166*91f16700Schasinglulu  * image info structures accordingly.
167*91f16700Schasinglulu  *
168*91f16700Schasinglulu  * Return: Return the status of the handoff. The value will be from the
169*91f16700Schasinglulu  *         xbl_handoff enum.
170*91f16700Schasinglulu  *
171*91f16700Schasinglulu  */
172*91f16700Schasinglulu enum xbl_handoff xbl_handover(entry_point_info_t *bl32,
173*91f16700Schasinglulu 					entry_point_info_t *bl33,
174*91f16700Schasinglulu 					uint64_t handoff_addr)
175*91f16700Schasinglulu {
176*91f16700Schasinglulu 	const struct xbl_handoff_params *HandoffParams;
177*91f16700Schasinglulu 
178*91f16700Schasinglulu 	if (!handoff_addr) {
179*91f16700Schasinglulu 		WARN("BL31: No handoff structure passed\n");
180*91f16700Schasinglulu 		return XBL_HANDOFF_NO_STRUCT;
181*91f16700Schasinglulu 	}
182*91f16700Schasinglulu 
183*91f16700Schasinglulu 	HandoffParams = (struct xbl_handoff_params *)handoff_addr;
184*91f16700Schasinglulu 	if ((HandoffParams->magic[0] != 'X') ||
185*91f16700Schasinglulu 	    (HandoffParams->magic[1] != 'L') ||
186*91f16700Schasinglulu 	    (HandoffParams->magic[2] != 'N') ||
187*91f16700Schasinglulu 	    (HandoffParams->magic[3] != 'X')) {
188*91f16700Schasinglulu 		ERROR("BL31: invalid handoff structure at %" PRIx64 "\n", handoff_addr);
189*91f16700Schasinglulu 		return XBL_HANDOFF_INVAL_STRUCT;
190*91f16700Schasinglulu 	}
191*91f16700Schasinglulu 
192*91f16700Schasinglulu 	VERBOSE("BL31: TF-A handoff params at:0x%" PRIx64 ", entries:%u\n",
193*91f16700Schasinglulu 		handoff_addr, HandoffParams->num_entries);
194*91f16700Schasinglulu 	if (HandoffParams->num_entries > XBL_MAX_PARTITIONS) {
195*91f16700Schasinglulu 		ERROR("BL31: TF-A handoff params: too many partitions (%u/%u)\n",
196*91f16700Schasinglulu 		      HandoffParams->num_entries, XBL_MAX_PARTITIONS);
197*91f16700Schasinglulu 		return XBL_HANDOFF_TOO_MANY_PARTS;
198*91f16700Schasinglulu 	}
199*91f16700Schasinglulu 
200*91f16700Schasinglulu 	/*
201*91f16700Schasinglulu 	 * we loop over all passed entries but only populate two image structs
202*91f16700Schasinglulu 	 * (bl32, bl33). I.e. the last applicable images in the handoff
203*91f16700Schasinglulu 	 * structure will be used for the hand off
204*91f16700Schasinglulu 	 */
205*91f16700Schasinglulu 	for (size_t i = 0; i < HandoffParams->num_entries; i++) {
206*91f16700Schasinglulu 		entry_point_info_t *image;
207*91f16700Schasinglulu 		int32_t target_estate, target_secure, target_cpu;
208*91f16700Schasinglulu 		uint32_t target_endianness, target_el;
209*91f16700Schasinglulu 
210*91f16700Schasinglulu 		VERBOSE("BL31: %zd: entry:0x%" PRIx64 ", flags:0x%" PRIx64 "\n", i,
211*91f16700Schasinglulu 			HandoffParams->partition[i].entry_point,
212*91f16700Schasinglulu 			HandoffParams->partition[i].flags);
213*91f16700Schasinglulu 
214*91f16700Schasinglulu #if defined(PLAT_versal_net)
215*91f16700Schasinglulu 		uint32_t target_cluster;
216*91f16700Schasinglulu 
217*91f16700Schasinglulu 		target_cluster = get_xbl_cluster(&HandoffParams->partition[i]);
218*91f16700Schasinglulu 		if (target_cluster != XBL_FLAGS_CLUSTER_0) {
219*91f16700Schasinglulu 			WARN("BL31: invalid target Cluster (%i)\n",
220*91f16700Schasinglulu 			     target_cluster);
221*91f16700Schasinglulu 			continue;
222*91f16700Schasinglulu 		}
223*91f16700Schasinglulu #endif /* PLAT_versal_net */
224*91f16700Schasinglulu 
225*91f16700Schasinglulu 		target_cpu = get_xbl_cpu(&HandoffParams->partition[i]);
226*91f16700Schasinglulu 		if (target_cpu != XBL_FLAGS_A53_0) {
227*91f16700Schasinglulu 			WARN("BL31: invalid target CPU (%i)\n", target_cpu);
228*91f16700Schasinglulu 			continue;
229*91f16700Schasinglulu 		}
230*91f16700Schasinglulu 
231*91f16700Schasinglulu 		target_el = get_xbl_el(&HandoffParams->partition[i]);
232*91f16700Schasinglulu 		if ((target_el == XBL_FLAGS_EL3) ||
233*91f16700Schasinglulu 		    (target_el == XBL_FLAGS_EL0)) {
234*91f16700Schasinglulu 			WARN("BL31: invalid target exception level(%i)\n",
235*91f16700Schasinglulu 			     target_el);
236*91f16700Schasinglulu 			continue;
237*91f16700Schasinglulu 		}
238*91f16700Schasinglulu 
239*91f16700Schasinglulu 		target_secure = get_xbl_ss(&HandoffParams->partition[i]);
240*91f16700Schasinglulu 		if (target_secure == XBL_FLAGS_SECURE &&
241*91f16700Schasinglulu 		    target_el == XBL_FLAGS_EL2) {
242*91f16700Schasinglulu 			WARN("BL31: invalid security state (%i) for exception level (%i)\n",
243*91f16700Schasinglulu 			     target_secure, target_el);
244*91f16700Schasinglulu 			continue;
245*91f16700Schasinglulu 		}
246*91f16700Schasinglulu 
247*91f16700Schasinglulu 		target_estate = get_xbl_estate(&HandoffParams->partition[i]);
248*91f16700Schasinglulu 		target_endianness = get_xbl_endian(&HandoffParams->partition[i]);
249*91f16700Schasinglulu 
250*91f16700Schasinglulu 		if (target_secure == XBL_FLAGS_SECURE) {
251*91f16700Schasinglulu 			image = bl32;
252*91f16700Schasinglulu 
253*91f16700Schasinglulu 			if (target_estate == XBL_FLAGS_ESTATE_A32) {
254*91f16700Schasinglulu 				bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
255*91f16700Schasinglulu 							 target_endianness,
256*91f16700Schasinglulu 							 DISABLE_ALL_EXCEPTIONS);
257*91f16700Schasinglulu 			} else {
258*91f16700Schasinglulu 				bl32->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
259*91f16700Schasinglulu 						     DISABLE_ALL_EXCEPTIONS);
260*91f16700Schasinglulu 			}
261*91f16700Schasinglulu 		} else {
262*91f16700Schasinglulu 			image = bl33;
263*91f16700Schasinglulu 
264*91f16700Schasinglulu 			if (target_estate == XBL_FLAGS_ESTATE_A32) {
265*91f16700Schasinglulu 				if (target_el == XBL_FLAGS_EL2) {
266*91f16700Schasinglulu 					target_el = MODE32_hyp;
267*91f16700Schasinglulu 				} else {
268*91f16700Schasinglulu 					target_el = MODE32_sys;
269*91f16700Schasinglulu 				}
270*91f16700Schasinglulu 
271*91f16700Schasinglulu 				bl33->spsr = SPSR_MODE32(target_el, SPSR_T_ARM,
272*91f16700Schasinglulu 							 target_endianness,
273*91f16700Schasinglulu 							 DISABLE_ALL_EXCEPTIONS);
274*91f16700Schasinglulu 			} else {
275*91f16700Schasinglulu 				if (target_el == XBL_FLAGS_EL2) {
276*91f16700Schasinglulu 					target_el = MODE_EL2;
277*91f16700Schasinglulu 				} else {
278*91f16700Schasinglulu 					target_el = MODE_EL1;
279*91f16700Schasinglulu 				}
280*91f16700Schasinglulu 
281*91f16700Schasinglulu 				bl33->spsr = SPSR_64(target_el, MODE_SP_ELX,
282*91f16700Schasinglulu 						     DISABLE_ALL_EXCEPTIONS);
283*91f16700Schasinglulu 			}
284*91f16700Schasinglulu 		}
285*91f16700Schasinglulu 
286*91f16700Schasinglulu 		VERBOSE("Setting up %s entry point to:%" PRIx64 ", el:%x\n",
287*91f16700Schasinglulu 			target_secure == XBL_FLAGS_SECURE ? "BL32" : "BL33",
288*91f16700Schasinglulu 			HandoffParams->partition[i].entry_point,
289*91f16700Schasinglulu 			target_el);
290*91f16700Schasinglulu 		image->pc = HandoffParams->partition[i].entry_point;
291*91f16700Schasinglulu 
292*91f16700Schasinglulu 		if (target_endianness == SPSR_E_BIG) {
293*91f16700Schasinglulu 			EP_SET_EE(image->h.attr, EP_EE_BIG);
294*91f16700Schasinglulu 		} else {
295*91f16700Schasinglulu 			EP_SET_EE(image->h.attr, EP_EE_LITTLE);
296*91f16700Schasinglulu 		}
297*91f16700Schasinglulu 	}
298*91f16700Schasinglulu 
299*91f16700Schasinglulu 	return XBL_HANDOFF_SUCCESS;
300*91f16700Schasinglulu }
301