1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu #include <common/debug.h> 8*91f16700Schasinglulu #include <common/fdt_fixup.h> 9*91f16700Schasinglulu #include <common/fdt_wrappers.h> 10*91f16700Schasinglulu #include <libfdt.h> 11*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_v2.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu #include <plat_fdt.h> 14*91f16700Schasinglulu #include <platform_def.h> 15*91f16700Schasinglulu 16*91f16700Schasinglulu void prepare_dtb(void) 17*91f16700Schasinglulu { 18*91f16700Schasinglulu #if defined(XILINX_OF_BOARD_DTB_ADDR) 19*91f16700Schasinglulu void *dtb; 20*91f16700Schasinglulu int map_ret = 0; 21*91f16700Schasinglulu int ret = 0; 22*91f16700Schasinglulu 23*91f16700Schasinglulu dtb = (void *)XILINX_OF_BOARD_DTB_ADDR; 24*91f16700Schasinglulu 25*91f16700Schasinglulu if (!IS_TFA_IN_OCM(BL31_BASE)) { 26*91f16700Schasinglulu 27*91f16700Schasinglulu #if defined(PLAT_XLAT_TABLES_DYNAMIC) 28*91f16700Schasinglulu map_ret = mmap_add_dynamic_region((unsigned long long)dtb, 29*91f16700Schasinglulu (uintptr_t)dtb, 30*91f16700Schasinglulu XILINX_OF_BOARD_DTB_MAX_SIZE, 31*91f16700Schasinglulu MT_MEMORY | MT_RW | MT_NS); 32*91f16700Schasinglulu if (map_ret != 0) { 33*91f16700Schasinglulu WARN("Failed to add dynamic region for dtb: error %d\n", 34*91f16700Schasinglulu map_ret); 35*91f16700Schasinglulu } 36*91f16700Schasinglulu #endif 37*91f16700Schasinglulu 38*91f16700Schasinglulu if (!map_ret) { 39*91f16700Schasinglulu /* Return if no device tree is detected */ 40*91f16700Schasinglulu if (fdt_check_header(dtb) != 0) { 41*91f16700Schasinglulu NOTICE("Can't read DT at %p\n", dtb); 42*91f16700Schasinglulu } else { 43*91f16700Schasinglulu ret = fdt_open_into(dtb, dtb, XILINX_OF_BOARD_DTB_MAX_SIZE); 44*91f16700Schasinglulu 45*91f16700Schasinglulu if (ret < 0) { 46*91f16700Schasinglulu ERROR("Invalid Device Tree at %p: error %d\n", 47*91f16700Schasinglulu dtb, ret); 48*91f16700Schasinglulu } else { 49*91f16700Schasinglulu 50*91f16700Schasinglulu if (dt_add_psci_node(dtb)) { 51*91f16700Schasinglulu WARN("Failed to add PSCI Device Tree node\n"); 52*91f16700Schasinglulu } 53*91f16700Schasinglulu 54*91f16700Schasinglulu if (dt_add_psci_cpu_enable_methods(dtb)) { 55*91f16700Schasinglulu WARN("Failed to add PSCI cpu enable methods in DT\n"); 56*91f16700Schasinglulu } 57*91f16700Schasinglulu 58*91f16700Schasinglulu /* Reserve memory used by Trusted Firmware. */ 59*91f16700Schasinglulu ret = fdt_add_reserved_memory(dtb, 60*91f16700Schasinglulu "tf-a", 61*91f16700Schasinglulu BL31_BASE, 62*91f16700Schasinglulu BL31_LIMIT 63*91f16700Schasinglulu - 64*91f16700Schasinglulu BL31_BASE); 65*91f16700Schasinglulu if (ret < 0) { 66*91f16700Schasinglulu WARN("Failed to add reserved memory nodes for BL31 to DT.\n"); 67*91f16700Schasinglulu } 68*91f16700Schasinglulu 69*91f16700Schasinglulu ret = fdt_pack(dtb); 70*91f16700Schasinglulu if (ret < 0) { 71*91f16700Schasinglulu WARN("Failed to pack dtb at %p: error %d\n", 72*91f16700Schasinglulu dtb, ret); 73*91f16700Schasinglulu } 74*91f16700Schasinglulu flush_dcache_range((uintptr_t)dtb, 75*91f16700Schasinglulu fdt_blob_size(dtb)); 76*91f16700Schasinglulu 77*91f16700Schasinglulu INFO("Changed device tree to advertise PSCI and reserved memories.\n"); 78*91f16700Schasinglulu 79*91f16700Schasinglulu } 80*91f16700Schasinglulu } 81*91f16700Schasinglulu 82*91f16700Schasinglulu } 83*91f16700Schasinglulu 84*91f16700Schasinglulu 85*91f16700Schasinglulu #if defined(PLAT_XLAT_TABLES_DYNAMIC) 86*91f16700Schasinglulu if (!map_ret) { 87*91f16700Schasinglulu ret = mmap_remove_dynamic_region((uintptr_t)dtb, 88*91f16700Schasinglulu XILINX_OF_BOARD_DTB_MAX_SIZE); 89*91f16700Schasinglulu if (ret != 0) { 90*91f16700Schasinglulu WARN("Failed to remove dynamic region for dtb:error %d\n", 91*91f16700Schasinglulu ret); 92*91f16700Schasinglulu } 93*91f16700Schasinglulu } 94*91f16700Schasinglulu #endif 95*91f16700Schasinglulu } 96*91f16700Schasinglulu 97*91f16700Schasinglulu #endif 98*91f16700Schasinglulu } 99