1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2013-2020, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * Copyright (c) 2020-2022, Xilinx, Inc. All rights reserved. 4*91f16700Schasinglulu * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. 5*91f16700Schasinglulu * 6*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 7*91f16700Schasinglulu */ 8*91f16700Schasinglulu 9*91f16700Schasinglulu #ifndef PM_IPI_H 10*91f16700Schasinglulu #define PM_IPI_H 11*91f16700Schasinglulu 12*91f16700Schasinglulu #include <stddef.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu #include <plat_ipi.h> 15*91f16700Schasinglulu #include "pm_common.h" 16*91f16700Schasinglulu 17*91f16700Schasinglulu #define IPI_BLOCKING 1 18*91f16700Schasinglulu #define IPI_NON_BLOCKING 0 19*91f16700Schasinglulu 20*91f16700Schasinglulu void pm_ipi_init(const struct pm_proc *proc); 21*91f16700Schasinglulu 22*91f16700Schasinglulu enum pm_ret_status pm_ipi_send(const struct pm_proc *proc, 23*91f16700Schasinglulu uint32_t payload[PAYLOAD_ARG_CNT]); 24*91f16700Schasinglulu enum pm_ret_status pm_ipi_send_non_blocking(const struct pm_proc *proc, 25*91f16700Schasinglulu uint32_t payload[PAYLOAD_ARG_CNT]); 26*91f16700Schasinglulu enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc, 27*91f16700Schasinglulu uint32_t payload[PAYLOAD_ARG_CNT], 28*91f16700Schasinglulu uint32_t *value, size_t count); 29*91f16700Schasinglulu enum pm_ret_status pm_ipi_buff_read_callb(uint32_t *value, size_t count); 30*91f16700Schasinglulu void pm_ipi_irq_enable(const struct pm_proc *proc); 31*91f16700Schasinglulu void pm_ipi_irq_clear(const struct pm_proc *proc); 32*91f16700Schasinglulu uint32_t pm_ipi_irq_status(const struct pm_proc *proc); 33*91f16700Schasinglulu #if IPI_CRC_CHECK 34*91f16700Schasinglulu uint32_t calculate_crc(uint32_t payload[PAYLOAD_ARG_CNT], uint32_t buffersize); 35*91f16700Schasinglulu #endif 36*91f16700Schasinglulu 37*91f16700Schasinglulu #endif /* PM_IPI_H */ 38