xref: /arm-trusted-firmware/plat/xilinx/common/include/plat_startup.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
4*91f16700Schasinglulu  *
5*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
6*91f16700Schasinglulu  */
7*91f16700Schasinglulu 
8*91f16700Schasinglulu #ifndef PLAT_STARTUP_H
9*91f16700Schasinglulu #define PLAT_STARTUP_H
10*91f16700Schasinglulu 
11*91f16700Schasinglulu #include <common/bl_common.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu /* For Xilinx bootloader XBL handover */
14*91f16700Schasinglulu enum xbl_handoff {
15*91f16700Schasinglulu 	XBL_HANDOFF_SUCCESS = 0,
16*91f16700Schasinglulu 	XBL_HANDOFF_NO_STRUCT,
17*91f16700Schasinglulu 	XBL_HANDOFF_INVAL_STRUCT,
18*91f16700Schasinglulu 	XBL_HANDOFF_TOO_MANY_PARTS
19*91f16700Schasinglulu };
20*91f16700Schasinglulu 
21*91f16700Schasinglulu #define XBL_MAX_PARTITIONS		8U
22*91f16700Schasinglulu 
23*91f16700Schasinglulu /* Structure corresponding to each partition entry */
24*91f16700Schasinglulu struct xbl_partition {
25*91f16700Schasinglulu 	uint64_t entry_point;
26*91f16700Schasinglulu 	uint64_t flags;
27*91f16700Schasinglulu };
28*91f16700Schasinglulu 
29*91f16700Schasinglulu /* Structure for handoff parameters to TrustedFirmware-A (TF-A) */
30*91f16700Schasinglulu struct xbl_handoff_params {
31*91f16700Schasinglulu 	uint8_t magic[4];
32*91f16700Schasinglulu 	uint32_t num_entries;
33*91f16700Schasinglulu 	struct xbl_partition partition[XBL_MAX_PARTITIONS];
34*91f16700Schasinglulu };
35*91f16700Schasinglulu 
36*91f16700Schasinglulu #define HANDOFF_PARAMS_MAX_SIZE	 sizeof(struct xbl_handoff_params)
37*91f16700Schasinglulu 
38*91f16700Schasinglulu enum xbl_handoff xbl_handover(entry_point_info_t *bl32,
39*91f16700Schasinglulu 					entry_point_info_t *bl33,
40*91f16700Schasinglulu 					uint64_t handoff_addr);
41*91f16700Schasinglulu 
42*91f16700Schasinglulu /* JEDEC Standard Manufacturer's Identification Code and Bank ID JEP106 */
43*91f16700Schasinglulu #define JEDEC_XILINX_MFID	U(0x49)
44*91f16700Schasinglulu #define JEDEC_XILINX_BKID	U(0)
45*91f16700Schasinglulu 
46*91f16700Schasinglulu #endif /* PLAT_STARTUP_H */
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