1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <lib/psci/psci.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu /* The power domain tree descriptor */ 12*91f16700Schasinglulu static unsigned char power_domain_tree_desc[] = { 13*91f16700Schasinglulu PLATFORM_SYSTEM_COUNT, 14*91f16700Schasinglulu PLATFORM_CLUSTER_COUNT, 15*91f16700Schasinglulu K3_CLUSTER0_CORE_COUNT, 16*91f16700Schasinglulu K3_CLUSTER1_CORE_COUNT, 17*91f16700Schasinglulu K3_CLUSTER2_CORE_COUNT, 18*91f16700Schasinglulu K3_CLUSTER3_CORE_COUNT, 19*91f16700Schasinglulu }; 20*91f16700Schasinglulu 21*91f16700Schasinglulu const unsigned char *plat_get_power_domain_tree_desc(void) 22*91f16700Schasinglulu { 23*91f16700Schasinglulu return power_domain_tree_desc; 24*91f16700Schasinglulu } 25*91f16700Schasinglulu 26*91f16700Schasinglulu int plat_core_pos_by_mpidr(u_register_t mpidr) 27*91f16700Schasinglulu { 28*91f16700Schasinglulu unsigned int cluster = MPIDR_AFFLVL1_VAL(mpidr); 29*91f16700Schasinglulu unsigned int core = MPIDR_AFFLVL0_VAL(mpidr); 30*91f16700Schasinglulu 31*91f16700Schasinglulu if (MPIDR_AFFLVL3_VAL(mpidr) > 0 || 32*91f16700Schasinglulu MPIDR_AFFLVL2_VAL(mpidr) > 0) { 33*91f16700Schasinglulu return -1; 34*91f16700Schasinglulu } 35*91f16700Schasinglulu 36*91f16700Schasinglulu if (cluster > 0) 37*91f16700Schasinglulu core += K3_CLUSTER0_CORE_COUNT; 38*91f16700Schasinglulu if (cluster > 1) 39*91f16700Schasinglulu core += K3_CLUSTER1_CORE_COUNT; 40*91f16700Schasinglulu if (cluster > 2) 41*91f16700Schasinglulu core += K3_CLUSTER2_CORE_COUNT; 42*91f16700Schasinglulu if (cluster > 3) 43*91f16700Schasinglulu return -1; 44*91f16700Schasinglulu 45*91f16700Schasinglulu return core; 46*91f16700Schasinglulu } 47