1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <lib/psci/psci.h> 10*91f16700Schasinglulu #include <plat/common/platform.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu /* 1 cluster, all cores into */ 13*91f16700Schasinglulu static const unsigned char stm32mp1_power_domain_tree_desc[] = { 14*91f16700Schasinglulu PLATFORM_CLUSTER_COUNT, 15*91f16700Schasinglulu PLATFORM_CORE_COUNT, 16*91f16700Schasinglulu }; 17*91f16700Schasinglulu 18*91f16700Schasinglulu /* This function returns the platform topology */ 19*91f16700Schasinglulu const unsigned char *plat_get_power_domain_tree_desc(void) 20*91f16700Schasinglulu { 21*91f16700Schasinglulu return stm32mp1_power_domain_tree_desc; 22*91f16700Schasinglulu } 23*91f16700Schasinglulu 24*91f16700Schasinglulu /******************************************************************************* 25*91f16700Schasinglulu * This function implements a part of the critical interface between the psci 26*91f16700Schasinglulu * generic layer and the platform that allows the former to query the platform 27*91f16700Schasinglulu * to convert an MPIDR to a unique linear index. An error code (-1) is returned 28*91f16700Schasinglulu * in case the MPIDR is invalid. 29*91f16700Schasinglulu ******************************************************************************/ 30*91f16700Schasinglulu int plat_core_pos_by_mpidr(u_register_t mpidr) 31*91f16700Schasinglulu { 32*91f16700Schasinglulu unsigned int cluster_id, cpu_id; 33*91f16700Schasinglulu u_register_t mpidr_copy = mpidr; 34*91f16700Schasinglulu 35*91f16700Schasinglulu mpidr_copy &= MPIDR_AFFINITY_MASK; 36*91f16700Schasinglulu 37*91f16700Schasinglulu if ((mpidr_copy & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) != 0U) { 38*91f16700Schasinglulu return -1; 39*91f16700Schasinglulu } 40*91f16700Schasinglulu 41*91f16700Schasinglulu cluster_id = (mpidr_copy >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 42*91f16700Schasinglulu cpu_id = (mpidr_copy >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 43*91f16700Schasinglulu 44*91f16700Schasinglulu if (cluster_id >= PLATFORM_CLUSTER_COUNT) { 45*91f16700Schasinglulu return -1; 46*91f16700Schasinglulu } 47*91f16700Schasinglulu 48*91f16700Schasinglulu /* 49*91f16700Schasinglulu * Validate cpu_id by checking whether it represents a CPU in one 50*91f16700Schasinglulu * of the two clusters present on the platform. 51*91f16700Schasinglulu */ 52*91f16700Schasinglulu if (cpu_id >= PLATFORM_CORE_COUNT) { 53*91f16700Schasinglulu return -1; 54*91f16700Schasinglulu } 55*91f16700Schasinglulu 56*91f16700Schasinglulu return (int)cpu_id; 57*91f16700Schasinglulu } 58