1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include "tbbr/tbb_ext.h" 8*91f16700Schasinglulu #include "tbbr/tbb_key.h" 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include "tbbr/stm32mp1_tbb_cert.h" 11*91f16700Schasinglulu 12*91f16700Schasinglulu /* 13*91f16700Schasinglulu * Certificates used in the chain of trust 14*91f16700Schasinglulu * 15*91f16700Schasinglulu * The order of the certificates must follow the enumeration specified in 16*91f16700Schasinglulu * stm32mp1_tbb_cert.h. All certificates are self-signed, so the issuer certificate 17*91f16700Schasinglulu * field points to itself. 18*91f16700Schasinglulu */ 19*91f16700Schasinglulu static cert_t stm32mp1_tbb_certs[] = { 20*91f16700Schasinglulu [0] = { 21*91f16700Schasinglulu .id = STM32MP_CONFIG_CERT, 22*91f16700Schasinglulu .opt = "stm32mp-cfg-cert", 23*91f16700Schasinglulu .help_msg = "STM32MP Config Certificate (output file)", 24*91f16700Schasinglulu .fn = NULL, 25*91f16700Schasinglulu .cn = "STM32MP config FW Certificate", 26*91f16700Schasinglulu .key = ROT_KEY, 27*91f16700Schasinglulu .issuer = STM32MP_CONFIG_CERT, 28*91f16700Schasinglulu .ext = { 29*91f16700Schasinglulu TRUSTED_FW_NVCOUNTER_EXT, 30*91f16700Schasinglulu HW_CONFIG_HASH_EXT, 31*91f16700Schasinglulu FW_CONFIG_HASH_EXT 32*91f16700Schasinglulu }, 33*91f16700Schasinglulu .num_ext = 3 34*91f16700Schasinglulu }, 35*91f16700Schasinglulu }; 36*91f16700Schasinglulu 37*91f16700Schasinglulu PLAT_REGISTER_COT(stm32mp1_tbb_certs); 38