xref: /arm-trusted-firmware/plat/st/stm32mp1/platform.mk (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu#
2*91f16700Schasinglulu# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu#
4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu#
6*91f16700Schasinglulu
7*91f16700Schasingluluinclude plat/st/common/common.mk
8*91f16700Schasinglulu
9*91f16700SchasingluluARM_CORTEX_A7		:=	yes
10*91f16700SchasingluluARM_WITH_NEON		:=	yes
11*91f16700SchasingluluUSE_COHERENT_MEM	:=	0
12*91f16700Schasinglulu
13*91f16700Schasinglulu# Default Device tree
14*91f16700SchasingluluDTB_FILE_NAME		?=	stm32mp157c-ev1.dtb
15*91f16700Schasinglulu
16*91f16700SchasingluluSTM32MP13		?=	0
17*91f16700SchasingluluSTM32MP15		?=	0
18*91f16700Schasinglulu
19*91f16700Schasingluluifeq ($(STM32MP13),1)
20*91f16700Schasingluluifeq ($(STM32MP15),1)
21*91f16700Schasinglulu$(error Cannot enable both flags STM32MP13 and STM32MP15)
22*91f16700Schasingluluendif
23*91f16700SchasingluluSTM32MP13		:=	1
24*91f16700SchasingluluSTM32MP15		:=	0
25*91f16700Schasingluluelse ifeq ($(STM32MP15),1)
26*91f16700SchasingluluSTM32MP13		:=	0
27*91f16700SchasingluluSTM32MP15		:=	1
28*91f16700Schasingluluelse ifneq ($(findstring stm32mp13,$(DTB_FILE_NAME)),)
29*91f16700SchasingluluSTM32MP13		:=	1
30*91f16700SchasingluluSTM32MP15		:=	0
31*91f16700Schasingluluelse ifneq ($(findstring stm32mp15,$(DTB_FILE_NAME)),)
32*91f16700SchasingluluSTM32MP13		:=	0
33*91f16700SchasingluluSTM32MP15		:=	1
34*91f16700Schasingluluendif
35*91f16700Schasinglulu
36*91f16700Schasingluluifeq ($(STM32MP13),1)
37*91f16700Schasinglulu# Will use SRAM2 as mbedtls heap
38*91f16700SchasingluluSTM32MP_USE_EXTERNAL_HEAP :=	1
39*91f16700Schasinglulu
40*91f16700Schasinglulu# DDR controller with single AXI port and 16-bit interface
41*91f16700SchasingluluSTM32MP_DDR_DUAL_AXI_PORT:=	0
42*91f16700SchasingluluSTM32MP_DDR_32BIT_INTERFACE:=	0
43*91f16700Schasinglulu
44*91f16700Schasingluluifeq (${TRUSTED_BOARD_BOOT},1)
45*91f16700Schasinglulu# PKA algo to include
46*91f16700SchasingluluPKA_USE_NIST_P256	:=	1
47*91f16700SchasingluluPKA_USE_BRAINPOOL_P256T1:=	1
48*91f16700Schasingluluendif
49*91f16700Schasinglulu
50*91f16700Schasinglulu# STM32 image header version v2.0
51*91f16700SchasingluluSTM32_HEADER_VERSION_MAJOR:=	2
52*91f16700SchasingluluSTM32_HEADER_VERSION_MINOR:=	0
53*91f16700Schasingluluendif
54*91f16700Schasinglulu
55*91f16700Schasingluluifeq ($(STM32MP15),1)
56*91f16700Schasinglulu# DDR controller with dual AXI port and 32-bit interface
57*91f16700SchasingluluSTM32MP_DDR_DUAL_AXI_PORT:=	1
58*91f16700SchasingluluSTM32MP_DDR_32BIT_INTERFACE:=	1
59*91f16700Schasinglulu
60*91f16700Schasinglulu# STM32 image header version v1.0
61*91f16700SchasingluluSTM32_HEADER_VERSION_MAJOR:=	1
62*91f16700SchasingluluSTM32_HEADER_VERSION_MINOR:=	0
63*91f16700Schasinglulu
64*91f16700Schasinglulu# Add OP-TEE reserved shared memory area in mapping
65*91f16700SchasingluluSTM32MP15_OPTEE_RSV_SHM	:=	0
66*91f16700Schasinglulu$(eval $(call add_defines,STM32MP15_OPTEE_RSV_SHM))
67*91f16700Schasinglulu
68*91f16700SchasingluluSTM32MP_CRYPTO_ROM_LIB :=	1
69*91f16700Schasinglulu
70*91f16700Schasinglulu# Decryption support
71*91f16700Schasingluluifneq ($(DECRYPTION_SUPPORT),none)
72*91f16700Schasinglulu$(error "DECRYPTION_SUPPORT not supported on STM32MP15")
73*91f16700Schasingluluendif
74*91f16700Schasingluluendif
75*91f16700Schasinglulu
76*91f16700SchasingluluPKA_USE_NIST_P256	?=	0
77*91f16700SchasingluluPKA_USE_BRAINPOOL_P256T1 ?=	0
78*91f16700Schasinglulu
79*91f16700Schasingluluifeq ($(AARCH32_SP),sp_min)
80*91f16700Schasinglulu# Disable Neon support: sp_min runtime may conflict with non-secure world
81*91f16700SchasingluluTF_CFLAGS		+=	-mfloat-abi=soft
82*91f16700Schasingluluendif
83*91f16700Schasinglulu
84*91f16700Schasinglulu# Not needed for Cortex-A7
85*91f16700SchasingluluWORKAROUND_CVE_2017_5715:=	0
86*91f16700SchasingluluWORKAROUND_CVE_2022_23960:=	0
87*91f16700Schasinglulu
88*91f16700Schasinglulu# Number of TF-A copies in the device
89*91f16700SchasingluluSTM32_TF_A_COPIES		:=	2
90*91f16700Schasinglulu
91*91f16700Schasinglulu# PLAT_PARTITION_MAX_ENTRIES must take care of STM32_TF-A_COPIES and other partitions
92*91f16700Schasinglulu# such as metadata (2) to find all the FIP partitions (default is 2).
93*91f16700SchasingluluPLAT_PARTITION_MAX_ENTRIES	:=	$(shell echo $$(($(STM32_TF_A_COPIES) + 4)))
94*91f16700Schasinglulu
95*91f16700Schasingluluifeq (${PSA_FWU_SUPPORT},1)
96*91f16700Schasinglulu# Number of banks of updatable firmware
97*91f16700SchasingluluNR_OF_FW_BANKS			:=	2
98*91f16700SchasingluluNR_OF_IMAGES_IN_FW_BANK		:=	1
99*91f16700Schasinglulu
100*91f16700SchasingluluFWU_MAX_PART = $(shell echo $$(($(STM32_TF_A_COPIES) + 2 + $(NR_OF_FW_BANKS))))
101*91f16700Schasingluluifeq ($(shell test $(FWU_MAX_PART) -gt $(PLAT_PARTITION_MAX_ENTRIES); echo $$?),0)
102*91f16700Schasinglulu$(error "Required partition number is $(FWU_MAX_PART) where PLAT_PARTITION_MAX_ENTRIES is only \
103*91f16700Schasinglulu$(PLAT_PARTITION_MAX_ENTRIES)")
104*91f16700Schasingluluendif
105*91f16700Schasingluluendif
106*91f16700Schasinglulu
107*91f16700Schasingluluifeq ($(STM32MP13),1)
108*91f16700SchasingluluSTM32_HASH_VER		:=	4
109*91f16700SchasingluluSTM32_RNG_VER		:=	4
110*91f16700Schasingluluelse # Assuming STM32MP15
111*91f16700SchasingluluSTM32_HASH_VER		:=	2
112*91f16700SchasingluluSTM32_RNG_VER		:=	2
113*91f16700Schasingluluendif
114*91f16700Schasinglulu
115*91f16700Schasinglulu# Download load address for serial boot devices
116*91f16700SchasingluluDWL_BUFFER_BASE 	?=	0xC7000000
117*91f16700Schasinglulu
118*91f16700Schasinglulu# Device tree
119*91f16700Schasingluluifeq ($(STM32MP13),1)
120*91f16700SchasingluluBL2_DTSI		:=	stm32mp13-bl2.dtsi
121*91f16700SchasingluluFDT_SOURCES		:=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
122*91f16700Schasingluluelse
123*91f16700SchasingluluBL2_DTSI		:=	stm32mp15-bl2.dtsi
124*91f16700SchasingluluFDT_SOURCES		:=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
125*91f16700Schasingluluifeq ($(AARCH32_SP),sp_min)
126*91f16700SchasingluluBL32_DTSI		:=	stm32mp15-bl32.dtsi
127*91f16700SchasingluluFDT_SOURCES		+=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dts,$(DTB_FILE_NAME)))
128*91f16700Schasingluluendif
129*91f16700Schasingluluendif
130*91f16700Schasinglulu
131*91f16700Schasinglulu# Macros and rules to build TF binary
132*91f16700SchasingluluSTM32_TF_STM32		:=	$(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME)))
133*91f16700SchasingluluSTM32_LD_FILE		:=	plat/st/stm32mp1/stm32mp1.ld.S
134*91f16700SchasingluluSTM32_BINARY_MAPPING	:=	plat/st/stm32mp1/stm32mp1.S
135*91f16700Schasinglulu
136*91f16700Schasingluluifeq ($(AARCH32_SP),sp_min)
137*91f16700Schasinglulu# BL32 is built only if using SP_MIN
138*91f16700SchasingluluBL32_DEP		:= bl32
139*91f16700SchasingluluASFLAGS			+= -DBL32_BIN_PATH=\"${BUILD_PLAT}/bl32.bin\"
140*91f16700Schasingluluendif
141*91f16700Schasinglulu
142*91f16700SchasingluluSTM32MP_FW_CONFIG_NAME	:=	$(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME))
143*91f16700SchasingluluSTM32MP_FW_CONFIG	:=	${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME)
144*91f16700Schasingluluifneq (${AARCH32_SP},none)
145*91f16700SchasingluluFDT_SOURCES		+=	$(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME)))
146*91f16700Schasingluluendif
147*91f16700Schasinglulu# Add the FW_CONFIG to FIP and specify the same to certtool
148*91f16700Schasinglulu$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config))
149*91f16700Schasingluluifeq ($(GENERATE_COT),1)
150*91f16700SchasingluluSTM32MP_CFG_CERT	:=	$(BUILD_PLAT)/stm32mp_cfg_cert.crt
151*91f16700Schasinglulu# Add the STM32MP_CFG_CERT to FIP and specify the same to certtool
152*91f16700Schasinglulu$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_CFG_CERT},--stm32mp-cfg-cert))
153*91f16700Schasingluluendif
154*91f16700Schasingluluifeq ($(AARCH32_SP),sp_min)
155*91f16700SchasingluluSTM32MP_TOS_FW_CONFIG	:= $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dtb,$(DTB_FILE_NAME)))
156*91f16700Schasinglulu$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_TOS_FW_CONFIG},--tos-fw-config))
157*91f16700Schasingluluendif
158*91f16700Schasinglulu
159*91f16700Schasinglulu# Enable flags for C files
160*91f16700Schasinglulu$(eval $(call assert_booleans,\
161*91f16700Schasinglulu	$(sort \
162*91f16700Schasinglulu		PKA_USE_BRAINPOOL_P256T1 \
163*91f16700Schasinglulu		PKA_USE_NIST_P256 \
164*91f16700Schasinglulu		STM32MP_CRYPTO_ROM_LIB \
165*91f16700Schasinglulu		STM32MP_DDR_32BIT_INTERFACE \
166*91f16700Schasinglulu		STM32MP_DDR_DUAL_AXI_PORT \
167*91f16700Schasinglulu		STM32MP_USE_EXTERNAL_HEAP \
168*91f16700Schasinglulu		STM32MP13 \
169*91f16700Schasinglulu		STM32MP15 \
170*91f16700Schasinglulu)))
171*91f16700Schasinglulu
172*91f16700Schasinglulu$(eval $(call assert_numerics,\
173*91f16700Schasinglulu	$(sort \
174*91f16700Schasinglulu		PLAT_PARTITION_MAX_ENTRIES \
175*91f16700Schasinglulu		STM32_HASH_VER \
176*91f16700Schasinglulu		STM32_HEADER_VERSION_MAJOR \
177*91f16700Schasinglulu		STM32_RNG_VER \
178*91f16700Schasinglulu		STM32_TF_A_COPIES \
179*91f16700Schasinglulu)))
180*91f16700Schasinglulu
181*91f16700Schasinglulu$(eval $(call add_defines,\
182*91f16700Schasinglulu	$(sort \
183*91f16700Schasinglulu		DWL_BUFFER_BASE \
184*91f16700Schasinglulu		PKA_USE_BRAINPOOL_P256T1 \
185*91f16700Schasinglulu		PKA_USE_NIST_P256 \
186*91f16700Schasinglulu		PLAT_PARTITION_MAX_ENTRIES \
187*91f16700Schasinglulu		PLAT_TBBR_IMG_DEF \
188*91f16700Schasinglulu		STM32_HASH_VER \
189*91f16700Schasinglulu		STM32_HEADER_VERSION_MAJOR \
190*91f16700Schasinglulu		STM32_RNG_VER \
191*91f16700Schasinglulu		STM32_TF_A_COPIES \
192*91f16700Schasinglulu		STM32MP_CRYPTO_ROM_LIB \
193*91f16700Schasinglulu		STM32MP_DDR_32BIT_INTERFACE \
194*91f16700Schasinglulu		STM32MP_DDR_DUAL_AXI_PORT \
195*91f16700Schasinglulu		STM32MP_USE_EXTERNAL_HEAP \
196*91f16700Schasinglulu		STM32MP13 \
197*91f16700Schasinglulu		STM32MP15 \
198*91f16700Schasinglulu)))
199*91f16700Schasinglulu
200*91f16700Schasinglulu# Include paths and source files
201*91f16700SchasingluluPLAT_INCLUDES		+=	-Iplat/st/stm32mp1/include/
202*91f16700Schasinglulu
203*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	+=	plat/st/stm32mp1/stm32mp1_private.c
204*91f16700Schasinglulu
205*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	+=	drivers/st/uart/aarch32/stm32_console.S
206*91f16700Schasinglulu
207*91f16700Schasingluluifneq (${ENABLE_STACK_PROTECTOR},0)
208*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	+=	plat/st/stm32mp1/stm32mp1_stack_protector.c
209*91f16700Schasingluluendif
210*91f16700Schasinglulu
211*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	+=	lib/cpus/aarch32/cortex_a7.S
212*91f16700Schasinglulu
213*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	+=	drivers/arm/tzc/tzc400.c				\
214*91f16700Schasinglulu				drivers/st/bsec/bsec2.c					\
215*91f16700Schasinglulu				drivers/st/ddr/stm32mp1_ddr_helpers.c			\
216*91f16700Schasinglulu				drivers/st/i2c/stm32_i2c.c				\
217*91f16700Schasinglulu				drivers/st/iwdg/stm32_iwdg.c				\
218*91f16700Schasinglulu				drivers/st/pmic/stm32mp_pmic.c				\
219*91f16700Schasinglulu				drivers/st/pmic/stpmic1.c				\
220*91f16700Schasinglulu				drivers/st/reset/stm32mp1_reset.c			\
221*91f16700Schasinglulu				plat/st/stm32mp1/stm32mp1_dbgmcu.c			\
222*91f16700Schasinglulu				plat/st/stm32mp1/stm32mp1_helper.S			\
223*91f16700Schasinglulu				plat/st/stm32mp1/stm32mp1_syscfg.c
224*91f16700Schasinglulu
225*91f16700Schasingluluifeq ($(STM32MP13),1)
226*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	+=	drivers/st/clk/clk-stm32-core.c				\
227*91f16700Schasinglulu				drivers/st/clk/clk-stm32mp13.c				\
228*91f16700Schasinglulu				drivers/st/crypto/stm32_rng.c
229*91f16700Schasingluluelse
230*91f16700SchasingluluPLAT_BL_COMMON_SOURCES	+=	drivers/st/clk/stm32mp1_clk.c
231*91f16700Schasingluluendif
232*91f16700Schasinglulu
233*91f16700SchasingluluBL2_SOURCES		+=	plat/st/stm32mp1/plat_bl2_mem_params_desc.c		\
234*91f16700Schasinglulu				plat/st/stm32mp1/stm32mp1_fconf_firewall.c
235*91f16700Schasinglulu
236*91f16700Schasingluluifeq (${PSA_FWU_SUPPORT},1)
237*91f16700Schasingluluinclude drivers/fwu/fwu.mk
238*91f16700Schasingluluendif
239*91f16700Schasinglulu
240*91f16700SchasingluluBL2_SOURCES		+=	drivers/st/crypto/stm32_hash.c				\
241*91f16700Schasinglulu				plat/st/stm32mp1/bl2_plat_setup.c
242*91f16700Schasinglulu
243*91f16700Schasingluluifeq (${TRUSTED_BOARD_BOOT},1)
244*91f16700Schasingluluifeq ($(STM32MP13),1)
245*91f16700SchasingluluBL2_SOURCES		+=	drivers/st/crypto/stm32_pka.c
246*91f16700SchasingluluBL2_SOURCES		+=	drivers/st/crypto/stm32_saes.c
247*91f16700Schasingluluendif
248*91f16700Schasingluluendif
249*91f16700Schasinglulu
250*91f16700Schasingluluifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),)
251*91f16700SchasingluluBL2_SOURCES		+=	drivers/st/mmc/stm32_sdmmc2.c
252*91f16700Schasingluluendif
253*91f16700Schasinglulu
254*91f16700Schasingluluifeq (${STM32MP_RAW_NAND},1)
255*91f16700SchasingluluBL2_SOURCES		+=	drivers/st/fmc/stm32_fmc2_nand.c
256*91f16700Schasingluluendif
257*91f16700Schasinglulu
258*91f16700Schasingluluifneq ($(filter 1,${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
259*91f16700SchasingluluBL2_SOURCES		+=	drivers/st/spi/stm32_qspi.c
260*91f16700Schasingluluendif
261*91f16700Schasinglulu
262*91f16700Schasingluluifneq ($(filter 1,${STM32MP_RAW_NAND} ${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
263*91f16700SchasingluluBL2_SOURCES		+=	plat/st/stm32mp1/stm32mp1_boot_device.c
264*91f16700Schasingluluendif
265*91f16700Schasinglulu
266*91f16700Schasingluluifeq (${STM32MP_UART_PROGRAMMER},1)
267*91f16700SchasingluluBL2_SOURCES		+=	drivers/st/uart/stm32_uart.c
268*91f16700Schasingluluendif
269*91f16700Schasinglulu
270*91f16700Schasingluluifeq (${STM32MP_USB_PROGRAMMER},1)
271*91f16700Schasinglulu#The DFU stack uses only one end point, reduce the USB stack footprint
272*91f16700Schasinglulu$(eval $(call add_define_val,CONFIG_USBD_EP_NB,1U))
273*91f16700SchasingluluBL2_SOURCES		+=	drivers/st/usb/stm32mp1_usb.c				\
274*91f16700Schasinglulu				plat/st/stm32mp1/stm32mp1_usb_dfu.c
275*91f16700Schasingluluendif
276*91f16700Schasinglulu
277*91f16700SchasingluluBL2_SOURCES		+=	drivers/st/ddr/stm32mp1_ddr.c				\
278*91f16700Schasinglulu				drivers/st/ddr/stm32mp1_ram.c
279*91f16700Schasinglulu
280*91f16700Schasingluluifeq ($(AARCH32_SP),sp_min)
281*91f16700Schasinglulu# Create DTB file for BL32
282*91f16700Schasinglulu${BUILD_PLAT}/fdts/%-bl32.dts: fdts/%.dts fdts/${BL32_DTSI} | ${BUILD_PLAT} fdt_dirs
283*91f16700Schasinglulu	@echo '#include "$(patsubst fdts/%,%,$<)"' > $@
284*91f16700Schasinglulu	@echo '#include "${BL32_DTSI}"' >> $@
285*91f16700Schasinglulu
286*91f16700Schasinglulu${BUILD_PLAT}/fdts/%-bl32.dtb: ${BUILD_PLAT}/fdts/%-bl32.dts
287*91f16700Schasingluluendif
288*91f16700Schasinglulu
289*91f16700Schasingluluinclude plat/st/common/common_rules.mk
290