1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <arch.h> 8*91f16700Schasinglulu #include <plat/common/platform.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include "uniphier.h" 11*91f16700Schasinglulu 12*91f16700Schasinglulu static unsigned char uniphier_power_domain_tree_desc[UNIPHIER_CLUSTER_COUNT + 1]; 13*91f16700Schasinglulu 14*91f16700Schasinglulu const unsigned char *plat_get_power_domain_tree_desc(void) 15*91f16700Schasinglulu { 16*91f16700Schasinglulu int i; 17*91f16700Schasinglulu 18*91f16700Schasinglulu uniphier_power_domain_tree_desc[0] = UNIPHIER_CLUSTER_COUNT; 19*91f16700Schasinglulu 20*91f16700Schasinglulu for (i = 0; i < UNIPHIER_CLUSTER_COUNT; i++) 21*91f16700Schasinglulu uniphier_power_domain_tree_desc[i + 1] = 22*91f16700Schasinglulu UNIPHIER_MAX_CPUS_PER_CLUSTER; 23*91f16700Schasinglulu 24*91f16700Schasinglulu return uniphier_power_domain_tree_desc; 25*91f16700Schasinglulu } 26*91f16700Schasinglulu 27*91f16700Schasinglulu int plat_core_pos_by_mpidr(u_register_t mpidr) 28*91f16700Schasinglulu { 29*91f16700Schasinglulu unsigned int cluster_id, cpu_id; 30*91f16700Schasinglulu 31*91f16700Schasinglulu cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 32*91f16700Schasinglulu if (cluster_id >= UNIPHIER_CLUSTER_COUNT) 33*91f16700Schasinglulu return -1; 34*91f16700Schasinglulu 35*91f16700Schasinglulu cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 36*91f16700Schasinglulu if (cpu_id >= UNIPHIER_MAX_CPUS_PER_CLUSTER) 37*91f16700Schasinglulu return -1; 38*91f16700Schasinglulu 39*91f16700Schasinglulu return uniphier_calc_core_pos(mpidr); 40*91f16700Schasinglulu } 41