1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <arch.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <sq_common.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu unsigned char sq_pd_tree_desc[PLAT_CLUSTER_COUNT + 1]; 14*91f16700Schasinglulu 15*91f16700Schasinglulu int plat_core_pos_by_mpidr(u_register_t mpidr) 16*91f16700Schasinglulu { 17*91f16700Schasinglulu unsigned int cluster_id, cpu_id; 18*91f16700Schasinglulu 19*91f16700Schasinglulu cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 20*91f16700Schasinglulu if (cluster_id >= PLAT_CLUSTER_COUNT) 21*91f16700Schasinglulu return -1; 22*91f16700Schasinglulu 23*91f16700Schasinglulu cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 24*91f16700Schasinglulu if (cpu_id >= PLAT_MAX_CORES_PER_CLUSTER) 25*91f16700Schasinglulu return -1; 26*91f16700Schasinglulu 27*91f16700Schasinglulu return sq_calc_core_pos(mpidr); 28*91f16700Schasinglulu } 29*91f16700Schasinglulu 30*91f16700Schasinglulu const unsigned char *plat_get_power_domain_tree_desc(void) 31*91f16700Schasinglulu { 32*91f16700Schasinglulu int i; 33*91f16700Schasinglulu 34*91f16700Schasinglulu sq_pd_tree_desc[0] = PLAT_CLUSTER_COUNT; 35*91f16700Schasinglulu 36*91f16700Schasinglulu for (i = 0; i < PLAT_CLUSTER_COUNT; i++) 37*91f16700Schasinglulu sq_pd_tree_desc[i + 1] = PLAT_MAX_CORES_PER_CLUSTER; 38*91f16700Schasinglulu 39*91f16700Schasinglulu return sq_pd_tree_desc; 40*91f16700Schasinglulu } 41