xref: /arm-trusted-firmware/plat/socionext/synquacer/sq_io_storage.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2022, Socionext Inc. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <assert.h>
8*91f16700Schasinglulu #include <errno.h>
9*91f16700Schasinglulu #include <stdint.h>
10*91f16700Schasinglulu 
11*91f16700Schasinglulu #include <drivers/io/io_block.h>
12*91f16700Schasinglulu #include <drivers/io/io_driver.h>
13*91f16700Schasinglulu #include <drivers/io/io_fip.h>
14*91f16700Schasinglulu #include <drivers/io/io_memmap.h>
15*91f16700Schasinglulu #include <lib/mmio.h>
16*91f16700Schasinglulu #include <lib/utils_def.h>
17*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_v2.h>
18*91f16700Schasinglulu #include <tools_share/firmware_image_package.h>
19*91f16700Schasinglulu 
20*91f16700Schasinglulu #include <platform_def.h>
21*91f16700Schasinglulu #include <sq_common.h>
22*91f16700Schasinglulu 
23*91f16700Schasinglulu static const io_dev_connector_t *sq_fip_dev_con;
24*91f16700Schasinglulu static uintptr_t sq_fip_dev_handle;
25*91f16700Schasinglulu 
26*91f16700Schasinglulu static const io_dev_connector_t *sq_backend_dev_con;
27*91f16700Schasinglulu static uintptr_t sq_backend_dev_handle;
28*91f16700Schasinglulu 
29*91f16700Schasinglulu static io_block_spec_t sq_fip_spec = {
30*91f16700Schasinglulu 	.offset = PLAT_SQ_FIP_IOBASE,	/* FIP Image is at 5MB offset on memory-mapped NOR flash */
31*91f16700Schasinglulu 	.length = PLAT_SQ_FIP_MAXSIZE,	/* Expected maximum FIP image size */
32*91f16700Schasinglulu };
33*91f16700Schasinglulu 
34*91f16700Schasinglulu static const io_uuid_spec_t sq_bl2_spec = {
35*91f16700Schasinglulu 	.uuid = UUID_TRUSTED_BOOT_FIRMWARE_BL2,
36*91f16700Schasinglulu };
37*91f16700Schasinglulu 
38*91f16700Schasinglulu static const io_uuid_spec_t sq_bl31_spec = {
39*91f16700Schasinglulu 	.uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31,
40*91f16700Schasinglulu };
41*91f16700Schasinglulu 
42*91f16700Schasinglulu static const io_uuid_spec_t sq_bl32_spec = {
43*91f16700Schasinglulu 	.uuid = UUID_SECURE_PAYLOAD_BL32,
44*91f16700Schasinglulu };
45*91f16700Schasinglulu 
46*91f16700Schasinglulu static const io_uuid_spec_t sq_bl33_spec = {
47*91f16700Schasinglulu 	.uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
48*91f16700Schasinglulu };
49*91f16700Schasinglulu 
50*91f16700Schasinglulu #if TRUSTED_BOARD_BOOT
51*91f16700Schasinglulu static const io_uuid_spec_t sq_tb_fw_cert_spec = {
52*91f16700Schasinglulu 	.uuid = UUID_TRUSTED_BOOT_FW_CERT,
53*91f16700Schasinglulu };
54*91f16700Schasinglulu 
55*91f16700Schasinglulu static const io_uuid_spec_t sq_trusted_key_cert_spec = {
56*91f16700Schasinglulu 	.uuid = UUID_TRUSTED_KEY_CERT,
57*91f16700Schasinglulu };
58*91f16700Schasinglulu 
59*91f16700Schasinglulu static const io_uuid_spec_t sq_soc_fw_key_cert_spec = {
60*91f16700Schasinglulu 	.uuid = UUID_SOC_FW_KEY_CERT,
61*91f16700Schasinglulu };
62*91f16700Schasinglulu 
63*91f16700Schasinglulu static const io_uuid_spec_t sq_tos_fw_key_cert_spec = {
64*91f16700Schasinglulu 	.uuid = UUID_TRUSTED_OS_FW_KEY_CERT,
65*91f16700Schasinglulu };
66*91f16700Schasinglulu 
67*91f16700Schasinglulu static const io_uuid_spec_t sq_nt_fw_key_cert_spec = {
68*91f16700Schasinglulu 	.uuid = UUID_NON_TRUSTED_FW_KEY_CERT,
69*91f16700Schasinglulu };
70*91f16700Schasinglulu 
71*91f16700Schasinglulu static const io_uuid_spec_t sq_soc_fw_cert_spec = {
72*91f16700Schasinglulu 	.uuid = UUID_SOC_FW_CONTENT_CERT,
73*91f16700Schasinglulu };
74*91f16700Schasinglulu 
75*91f16700Schasinglulu static const io_uuid_spec_t sq_tos_fw_cert_spec = {
76*91f16700Schasinglulu 	.uuid = UUID_TRUSTED_OS_FW_CONTENT_CERT,
77*91f16700Schasinglulu };
78*91f16700Schasinglulu 
79*91f16700Schasinglulu static const io_uuid_spec_t sq_nt_fw_cert_spec = {
80*91f16700Schasinglulu 	.uuid = UUID_NON_TRUSTED_FW_CONTENT_CERT,
81*91f16700Schasinglulu };
82*91f16700Schasinglulu #endif /* TRUSTED_BOARD_BOOT */
83*91f16700Schasinglulu 
84*91f16700Schasinglulu struct sq_io_policy {
85*91f16700Schasinglulu 	uintptr_t *dev_handle;
86*91f16700Schasinglulu 	uintptr_t image_spec;
87*91f16700Schasinglulu 	uintptr_t init_params;
88*91f16700Schasinglulu };
89*91f16700Schasinglulu 
90*91f16700Schasinglulu static const struct sq_io_policy sq_io_policies[] = {
91*91f16700Schasinglulu 	[FIP_IMAGE_ID] = {
92*91f16700Schasinglulu 		.dev_handle = &sq_backend_dev_handle,
93*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_fip_spec,
94*91f16700Schasinglulu 	},
95*91f16700Schasinglulu 	[BL2_IMAGE_ID] = {
96*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
97*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_bl2_spec,
98*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
99*91f16700Schasinglulu 	},
100*91f16700Schasinglulu 	[BL31_IMAGE_ID] = {
101*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
102*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_bl31_spec,
103*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
104*91f16700Schasinglulu 	},
105*91f16700Schasinglulu 	[BL32_IMAGE_ID] = {
106*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
107*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_bl32_spec,
108*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
109*91f16700Schasinglulu 	},
110*91f16700Schasinglulu 	[BL33_IMAGE_ID] = {
111*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
112*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_bl33_spec,
113*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
114*91f16700Schasinglulu 	},
115*91f16700Schasinglulu #if TRUSTED_BOARD_BOOT
116*91f16700Schasinglulu 	[TRUSTED_BOOT_FW_CERT_ID] = {
117*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
118*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_tb_fw_cert_spec,
119*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
120*91f16700Schasinglulu 	},
121*91f16700Schasinglulu 	[TRUSTED_KEY_CERT_ID] = {
122*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
123*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_trusted_key_cert_spec,
124*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
125*91f16700Schasinglulu 	},
126*91f16700Schasinglulu 	[SOC_FW_KEY_CERT_ID] = {
127*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
128*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_soc_fw_key_cert_spec,
129*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
130*91f16700Schasinglulu 	},
131*91f16700Schasinglulu 	[TRUSTED_OS_FW_KEY_CERT_ID] = {
132*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
133*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_tos_fw_key_cert_spec,
134*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
135*91f16700Schasinglulu 	},
136*91f16700Schasinglulu 	[NON_TRUSTED_FW_KEY_CERT_ID] = {
137*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
138*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_nt_fw_key_cert_spec,
139*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
140*91f16700Schasinglulu 	},
141*91f16700Schasinglulu 	[SOC_FW_CONTENT_CERT_ID] = {
142*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
143*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_soc_fw_cert_spec,
144*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
145*91f16700Schasinglulu 	},
146*91f16700Schasinglulu 	[TRUSTED_OS_FW_CONTENT_CERT_ID] = {
147*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
148*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_tos_fw_cert_spec,
149*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
150*91f16700Schasinglulu 	},
151*91f16700Schasinglulu 	[NON_TRUSTED_FW_CONTENT_CERT_ID] = {
152*91f16700Schasinglulu 		.dev_handle = &sq_fip_dev_handle,
153*91f16700Schasinglulu 		.image_spec = (uintptr_t)&sq_nt_fw_cert_spec,
154*91f16700Schasinglulu 		.init_params = FIP_IMAGE_ID,
155*91f16700Schasinglulu 	},
156*91f16700Schasinglulu #endif
157*91f16700Schasinglulu };
158*91f16700Schasinglulu 
159*91f16700Schasinglulu static int sq_update_fip_spec(void)
160*91f16700Schasinglulu {
161*91f16700Schasinglulu 	uint32_t boot_index;
162*91f16700Schasinglulu 	int ret;
163*91f16700Schasinglulu 
164*91f16700Schasinglulu 	ret = mmap_add_dynamic_region(PLAT_SQ_BOOTIDX_BASE, PLAT_SQ_BOOTIDX_BASE,
165*91f16700Schasinglulu 				      PAGE_SIZE, MT_RO_DATA | MT_SECURE);
166*91f16700Schasinglulu 	if (ret) {
167*91f16700Schasinglulu 		return ret;
168*91f16700Schasinglulu 	}
169*91f16700Schasinglulu 
170*91f16700Schasinglulu 	boot_index = mmio_read_32(PLAT_SQ_BOOTIDX_BASE);
171*91f16700Schasinglulu 	if (boot_index < PLAT_SQ_MAX_BOOT_INDEX) {
172*91f16700Schasinglulu 		sq_fip_spec.offset += PLAT_SQ_FIP_MAXSIZE * boot_index;
173*91f16700Schasinglulu 		INFO("FWU Enabled: boot_index %d\n", boot_index);
174*91f16700Schasinglulu 	} else {
175*91f16700Schasinglulu 		WARN("FWU Disabled: wrong boot_index value. Fallback to index 0.\n");
176*91f16700Schasinglulu 	}
177*91f16700Schasinglulu 
178*91f16700Schasinglulu 	mmap_remove_dynamic_region(PLAT_SQ_BOOTIDX_BASE, PAGE_SIZE);
179*91f16700Schasinglulu 	return 0;
180*91f16700Schasinglulu }
181*91f16700Schasinglulu 
182*91f16700Schasinglulu static int sq_io_memmap_setup(void)
183*91f16700Schasinglulu {
184*91f16700Schasinglulu 	int ret;
185*91f16700Schasinglulu 
186*91f16700Schasinglulu 	ret = sq_update_fip_spec();
187*91f16700Schasinglulu 	if (ret) {
188*91f16700Schasinglulu 		return ret;
189*91f16700Schasinglulu 	}
190*91f16700Schasinglulu 
191*91f16700Schasinglulu 	ret = mmap_add_dynamic_region(sq_fip_spec.offset, sq_fip_spec.offset,
192*91f16700Schasinglulu 				      sq_fip_spec.length, MT_RO_DATA | MT_SECURE);
193*91f16700Schasinglulu 	if (ret) {
194*91f16700Schasinglulu 		return ret;
195*91f16700Schasinglulu 	}
196*91f16700Schasinglulu 
197*91f16700Schasinglulu 	ret = register_io_dev_memmap(&sq_backend_dev_con);
198*91f16700Schasinglulu 	if (ret) {
199*91f16700Schasinglulu 		return ret;
200*91f16700Schasinglulu 	}
201*91f16700Schasinglulu 
202*91f16700Schasinglulu 	return io_dev_open(sq_backend_dev_con, 0, &sq_backend_dev_handle);
203*91f16700Schasinglulu }
204*91f16700Schasinglulu 
205*91f16700Schasinglulu static int sq_io_fip_setup(void)
206*91f16700Schasinglulu {
207*91f16700Schasinglulu 	int ret;
208*91f16700Schasinglulu 
209*91f16700Schasinglulu 	ret = register_io_dev_fip(&sq_fip_dev_con);
210*91f16700Schasinglulu 	if (ret) {
211*91f16700Schasinglulu 		return ret;
212*91f16700Schasinglulu 	}
213*91f16700Schasinglulu 
214*91f16700Schasinglulu 	return io_dev_open(sq_fip_dev_con, 0, &sq_fip_dev_handle);
215*91f16700Schasinglulu }
216*91f16700Schasinglulu 
217*91f16700Schasinglulu int sq_io_setup(void)
218*91f16700Schasinglulu {
219*91f16700Schasinglulu 	int ret;
220*91f16700Schasinglulu 
221*91f16700Schasinglulu 	ret = sq_io_memmap_setup();
222*91f16700Schasinglulu 	if (ret) {
223*91f16700Schasinglulu 		return ret;
224*91f16700Schasinglulu 	}
225*91f16700Schasinglulu 
226*91f16700Schasinglulu 	ret = sq_io_fip_setup();
227*91f16700Schasinglulu 	if (ret) {
228*91f16700Schasinglulu 		return ret;
229*91f16700Schasinglulu 	}
230*91f16700Schasinglulu 
231*91f16700Schasinglulu 	return 0;
232*91f16700Schasinglulu }
233*91f16700Schasinglulu 
234*91f16700Schasinglulu int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
235*91f16700Schasinglulu 			  uintptr_t *image_spec)
236*91f16700Schasinglulu {
237*91f16700Schasinglulu 	uintptr_t init_params;
238*91f16700Schasinglulu 
239*91f16700Schasinglulu 	assert(image_id < ARRAY_SIZE(sq_io_policies));
240*91f16700Schasinglulu 
241*91f16700Schasinglulu 	*dev_handle = *sq_io_policies[image_id].dev_handle;
242*91f16700Schasinglulu 	*image_spec = sq_io_policies[image_id].image_spec;
243*91f16700Schasinglulu 	init_params = sq_io_policies[image_id].init_params;
244*91f16700Schasinglulu 
245*91f16700Schasinglulu 	return io_dev_init(*dev_handle, init_params);
246*91f16700Schasinglulu }
247