1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2022, Socionext Inc. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <assert.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <arch.h> 10*91f16700Schasinglulu #include <common/desc_image_load.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #include <platform_def.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu static struct bl_mem_params_node sq_image_descs[] = { 15*91f16700Schasinglulu { 16*91f16700Schasinglulu .image_id = BL31_IMAGE_ID, 17*91f16700Schasinglulu 18*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 19*91f16700Schasinglulu VERSION_2, image_info_t, 0), 20*91f16700Schasinglulu .image_info.image_base = BL31_BASE, 21*91f16700Schasinglulu .image_info.image_max_size = BL31_SIZE, 22*91f16700Schasinglulu 23*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 24*91f16700Schasinglulu VERSION_2, entry_point_info_t, 25*91f16700Schasinglulu SECURE | EXECUTABLE | EP_FIRST_EXE), 26*91f16700Schasinglulu .ep_info.pc = BL31_BASE, 27*91f16700Schasinglulu .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, 28*91f16700Schasinglulu DISABLE_ALL_EXCEPTIONS), 29*91f16700Schasinglulu 30*91f16700Schasinglulu .next_handoff_image_id = BL32_IMAGE_ID, 31*91f16700Schasinglulu }, 32*91f16700Schasinglulu { 33*91f16700Schasinglulu .image_id = BL32_IMAGE_ID, 34*91f16700Schasinglulu 35*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 36*91f16700Schasinglulu VERSION_2, image_info_t, 0), 37*91f16700Schasinglulu .image_info.image_base = BL32_BASE, 38*91f16700Schasinglulu .image_info.image_max_size = BL32_SIZE, 39*91f16700Schasinglulu 40*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 41*91f16700Schasinglulu VERSION_2, entry_point_info_t, 42*91f16700Schasinglulu SECURE | EXECUTABLE), 43*91f16700Schasinglulu .ep_info.pc = BL32_BASE, 44*91f16700Schasinglulu .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, 45*91f16700Schasinglulu DISABLE_ALL_EXCEPTIONS), 46*91f16700Schasinglulu 47*91f16700Schasinglulu .next_handoff_image_id = BL33_IMAGE_ID, 48*91f16700Schasinglulu }, 49*91f16700Schasinglulu { 50*91f16700Schasinglulu .image_id = BL33_IMAGE_ID, 51*91f16700Schasinglulu 52*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 53*91f16700Schasinglulu VERSION_2, image_info_t, 0), 54*91f16700Schasinglulu .image_info.image_base = PLAT_SQ_BL33_BASE, 55*91f16700Schasinglulu .image_info.image_max_size = PLAT_SQ_BL33_SIZE, 56*91f16700Schasinglulu 57*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 58*91f16700Schasinglulu VERSION_2, entry_point_info_t, 59*91f16700Schasinglulu NON_SECURE | EXECUTABLE), 60*91f16700Schasinglulu .ep_info.pc = PLAT_SQ_BL33_BASE, 61*91f16700Schasinglulu .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, 62*91f16700Schasinglulu DISABLE_ALL_EXCEPTIONS), 63*91f16700Schasinglulu 64*91f16700Schasinglulu .next_handoff_image_id = INVALID_IMAGE_ID, 65*91f16700Schasinglulu }, 66*91f16700Schasinglulu }; 67*91f16700Schasinglulu REGISTER_BL_IMAGE_DESCS(sq_image_descs) 68*91f16700Schasinglulu 69*91f16700Schasinglulu struct image_info *sq_get_image_info(unsigned int image_id) 70*91f16700Schasinglulu { 71*91f16700Schasinglulu struct bl_mem_params_node *desc; 72*91f16700Schasinglulu 73*91f16700Schasinglulu desc = get_bl_mem_params_node(image_id); 74*91f16700Schasinglulu assert(desc); 75*91f16700Schasinglulu return &desc->image_info; 76*91f16700Schasinglulu } 77