1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu 7*91f16700Schasingluluinclude lib/libfdt/libfdt.mk 8*91f16700Schasingluluinclude lib/xlat_tables_v2/xlat_tables.mk 9*91f16700Schasinglulu 10*91f16700Schasingluluinclude drivers/arm/gic/v2/gicv2.mk 11*91f16700Schasinglulu 12*91f16700SchasingluluPLAT_INCLUDES := -Iplat/rpi/common/include \ 13*91f16700Schasinglulu -Iplat/rpi/rpi4/include 14*91f16700Schasinglulu 15*91f16700SchasingluluPLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \ 16*91f16700Schasinglulu drivers/arm/pl011/aarch64/pl011_console.S \ 17*91f16700Schasinglulu plat/rpi/common/rpi3_common.c \ 18*91f16700Schasinglulu ${XLAT_TABLES_LIB_SRCS} 19*91f16700Schasinglulu 20*91f16700SchasingluluBL31_SOURCES += lib/cpus/aarch64/cortex_a72.S \ 21*91f16700Schasinglulu plat/rpi/common/aarch64/plat_helpers.S \ 22*91f16700Schasinglulu plat/rpi/rpi4/aarch64/armstub8_header.S \ 23*91f16700Schasinglulu drivers/delay_timer/delay_timer.c \ 24*91f16700Schasinglulu drivers/gpio/gpio.c \ 25*91f16700Schasinglulu drivers/rpi3/gpio/rpi3_gpio.c \ 26*91f16700Schasinglulu plat/common/plat_gicv2.c \ 27*91f16700Schasinglulu plat/rpi/rpi4/rpi4_bl31_setup.c \ 28*91f16700Schasinglulu plat/rpi/common/rpi3_pm.c \ 29*91f16700Schasinglulu plat/common/plat_psci_common.c \ 30*91f16700Schasinglulu plat/rpi/common/rpi3_topology.c \ 31*91f16700Schasinglulu common/fdt_fixup.c \ 32*91f16700Schasinglulu ${LIBFDT_SRCS} \ 33*91f16700Schasinglulu ${GICV2_SOURCES} 34*91f16700Schasinglulu 35*91f16700Schasinglulu# For now we only support BL31, using the kernel loaded by the GPU firmware. 36*91f16700SchasingluluRESET_TO_BL31 := 1 37*91f16700Schasinglulu 38*91f16700Schasinglulu# All CPUs enter armstub8.bin. 39*91f16700SchasingluluCOLD_BOOT_SINGLE_CPU := 0 40*91f16700Schasinglulu 41*91f16700Schasinglulu# Tune compiler for Cortex-A72 42*91f16700Schasingluluifeq ($(notdir $(CC)),armclang) 43*91f16700Schasinglulu TF_CFLAGS_aarch64 += -mcpu=cortex-a72 44*91f16700Schasingluluelse ifneq ($(findstring clang,$(notdir $(CC))),) 45*91f16700Schasinglulu TF_CFLAGS_aarch64 += -mcpu=cortex-a72 46*91f16700Schasingluluelse 47*91f16700Schasinglulu TF_CFLAGS_aarch64 += -mtune=cortex-a72 48*91f16700Schasingluluendif 49*91f16700Schasinglulu 50*91f16700Schasinglulu# Add support for platform supplied linker script for BL31 build 51*91f16700Schasinglulu$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 52*91f16700Schasinglulu 53*91f16700Schasinglulu# Enable all errata workarounds for Cortex-A72 54*91f16700SchasingluluERRATA_A72_859971 := 1 55*91f16700Schasinglulu 56*91f16700SchasingluluWORKAROUND_CVE_2017_5715 := 1 57*91f16700Schasinglulu 58*91f16700Schasinglulu# Add new default target when compiling this platform 59*91f16700Schasingluluall: bl31 60*91f16700Schasinglulu 61*91f16700Schasinglulu# Build config flags 62*91f16700Schasinglulu# ------------------ 63*91f16700Schasinglulu 64*91f16700Schasinglulu# Disable stack protector by default 65*91f16700SchasingluluENABLE_STACK_PROTECTOR := 0 66*91f16700Schasinglulu 67*91f16700Schasinglulu# Have different sections for code and rodata 68*91f16700SchasingluluSEPARATE_CODE_AND_RODATA := 1 69*91f16700Schasinglulu 70*91f16700Schasinglulu# Use Coherent memory 71*91f16700SchasingluluUSE_COHERENT_MEM := 1 72*91f16700Schasinglulu 73*91f16700Schasinglulu# Platform build flags 74*91f16700Schasinglulu# -------------------- 75*91f16700Schasinglulu 76*91f16700Schasinglulu# There is not much else than a Linux kernel to load at the moment. 77*91f16700SchasingluluRPI3_DIRECT_LINUX_BOOT := 1 78*91f16700Schasinglulu 79*91f16700Schasinglulu# BL33 images are in AArch64 by default 80*91f16700SchasingluluRPI3_BL33_IN_AARCH32 := 0 81*91f16700Schasinglulu 82*91f16700Schasinglulu# UART to use at runtime. -1 means the runtime UART is disabled. 83*91f16700Schasinglulu# Any other value means the default UART will be used. 84*91f16700SchasingluluRPI3_RUNTIME_UART := 0 85*91f16700Schasinglulu 86*91f16700Schasinglulu# Use normal memory mapping for ROM, FIP, SRAM and DRAM 87*91f16700SchasingluluRPI3_USE_UEFI_MAP := 0 88*91f16700Schasinglulu 89*91f16700Schasinglulu# SMCCC PCI support (should be enabled for ACPI builds) 90*91f16700SchasingluluSMC_PCI_SUPPORT := 0 91*91f16700Schasinglulu 92*91f16700Schasinglulu# Process platform flags 93*91f16700Schasinglulu# ---------------------- 94*91f16700Schasinglulu 95*91f16700Schasinglulu$(eval $(call add_define,RPI3_BL33_IN_AARCH32)) 96*91f16700Schasinglulu$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT)) 97*91f16700Schasingluluifdef RPI3_PRELOADED_DTB_BASE 98*91f16700Schasinglulu$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE)) 99*91f16700Schasingluluendif 100*91f16700Schasinglulu$(eval $(call add_define,RPI3_RUNTIME_UART)) 101*91f16700Schasinglulu$(eval $(call add_define,RPI3_USE_UEFI_MAP)) 102*91f16700Schasinglulu$(eval $(call add_define,SMC_PCI_SUPPORT)) 103*91f16700Schasinglulu 104*91f16700Schasingluluifeq (${ARCH},aarch32) 105*91f16700Schasinglulu $(error Error: AArch32 not supported on rpi4) 106*91f16700Schasingluluendif 107*91f16700Schasinglulu 108*91f16700Schasingluluifneq ($(ENABLE_STACK_PROTECTOR), 0) 109*91f16700SchasingluluPLAT_BL_COMMON_SOURCES += drivers/rpi3/rng/rpi3_rng.c \ 110*91f16700Schasinglulu plat/rpi/common/rpi3_stack_protector.c 111*91f16700Schasingluluendif 112*91f16700Schasinglulu 113*91f16700Schasingluluifeq ($(SMC_PCI_SUPPORT), 1) 114*91f16700SchasingluluBL31_SOURCES += plat/rpi/rpi4/rpi4_pci_svc.c 115*91f16700Schasingluluendif 116*91f16700Schasinglulu 117