xref: /arm-trusted-firmware/plat/rpi/rpi3/rpi3_bl31_setup.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <assert.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <libfdt.h>
10*91f16700Schasinglulu 
11*91f16700Schasinglulu #include <platform_def.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu #include <common/bl_common.h>
14*91f16700Schasinglulu #include <lib/xlat_tables/xlat_mmu_helpers.h>
15*91f16700Schasinglulu #include <lib/xlat_tables/xlat_tables_defs.h>
16*91f16700Schasinglulu #include <plat/common/platform.h>
17*91f16700Schasinglulu 
18*91f16700Schasinglulu #include <rpi_shared.h>
19*91f16700Schasinglulu 
20*91f16700Schasinglulu /*
21*91f16700Schasinglulu  * Placeholder variables for copying the arguments that have been passed to
22*91f16700Schasinglulu  * BL31 from BL2.
23*91f16700Schasinglulu  */
24*91f16700Schasinglulu static entry_point_info_t bl32_image_ep_info;
25*91f16700Schasinglulu static entry_point_info_t bl33_image_ep_info;
26*91f16700Schasinglulu 
27*91f16700Schasinglulu /*******************************************************************************
28*91f16700Schasinglulu  * Return a pointer to the 'entry_point_info' structure of the next image for
29*91f16700Schasinglulu  * the security state specified. BL33 corresponds to the non-secure image type
30*91f16700Schasinglulu  * while BL32 corresponds to the secure image type. A NULL pointer is returned
31*91f16700Schasinglulu  * if the image does not exist.
32*91f16700Schasinglulu  ******************************************************************************/
33*91f16700Schasinglulu entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
34*91f16700Schasinglulu {
35*91f16700Schasinglulu 	entry_point_info_t *next_image_info;
36*91f16700Schasinglulu 
37*91f16700Schasinglulu 	assert(sec_state_is_valid(type) != 0);
38*91f16700Schasinglulu 
39*91f16700Schasinglulu 	next_image_info = (type == NON_SECURE)
40*91f16700Schasinglulu 			? &bl33_image_ep_info : &bl32_image_ep_info;
41*91f16700Schasinglulu 
42*91f16700Schasinglulu 	/* None of the images can have 0x0 as the entrypoint. */
43*91f16700Schasinglulu 	if (next_image_info->pc) {
44*91f16700Schasinglulu 		return next_image_info;
45*91f16700Schasinglulu 	} else {
46*91f16700Schasinglulu 		return NULL;
47*91f16700Schasinglulu 	}
48*91f16700Schasinglulu }
49*91f16700Schasinglulu 
50*91f16700Schasinglulu /*******************************************************************************
51*91f16700Schasinglulu  * Return entrypoint of BL33.
52*91f16700Schasinglulu  ******************************************************************************/
53*91f16700Schasinglulu uintptr_t plat_get_ns_image_entrypoint(void)
54*91f16700Schasinglulu {
55*91f16700Schasinglulu #ifdef PRELOADED_BL33_BASE
56*91f16700Schasinglulu 	return PRELOADED_BL33_BASE;
57*91f16700Schasinglulu #else
58*91f16700Schasinglulu 	return PLAT_RPI3_NS_IMAGE_OFFSET;
59*91f16700Schasinglulu #endif
60*91f16700Schasinglulu }
61*91f16700Schasinglulu 
62*91f16700Schasinglulu /*******************************************************************************
63*91f16700Schasinglulu  * Perform any BL31 early platform setup. Here is an opportunity to copy
64*91f16700Schasinglulu  * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before
65*91f16700Schasinglulu  * they are lost (potentially). This needs to be done before the MMU is
66*91f16700Schasinglulu  * initialized so that the memory layout can be used while creating page
67*91f16700Schasinglulu  * tables. BL2 has flushed this information to memory, so we are guaranteed
68*91f16700Schasinglulu  * to pick up good data.
69*91f16700Schasinglulu  ******************************************************************************/
70*91f16700Schasinglulu void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
71*91f16700Schasinglulu 				u_register_t arg2, u_register_t arg3)
72*91f16700Schasinglulu 
73*91f16700Schasinglulu {
74*91f16700Schasinglulu 	/* Initialize the console to provide early debug support */
75*91f16700Schasinglulu 	rpi3_console_init();
76*91f16700Schasinglulu 
77*91f16700Schasinglulu 	/*
78*91f16700Schasinglulu 	 * In debug builds, a special value is passed in 'arg1' to verify
79*91f16700Schasinglulu 	 * platform parameters from BL2 to BL31. Not used in release builds.
80*91f16700Schasinglulu 	 */
81*91f16700Schasinglulu 	assert(arg1 == RPI3_BL31_PLAT_PARAM_VAL);
82*91f16700Schasinglulu 
83*91f16700Schasinglulu 	/* Check that params passed from BL2 are not NULL. */
84*91f16700Schasinglulu 	bl_params_t *params_from_bl2 = (bl_params_t *) arg0;
85*91f16700Schasinglulu 
86*91f16700Schasinglulu 	assert(params_from_bl2 != NULL);
87*91f16700Schasinglulu 	assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
88*91f16700Schasinglulu 	assert(params_from_bl2->h.version >= VERSION_2);
89*91f16700Schasinglulu 
90*91f16700Schasinglulu 	bl_params_node_t *bl_params = params_from_bl2->head;
91*91f16700Schasinglulu 
92*91f16700Schasinglulu 	/*
93*91f16700Schasinglulu 	 * Copy BL33 and BL32 (if present), entry point information.
94*91f16700Schasinglulu 	 * They are stored in Secure RAM, in BL2's address space.
95*91f16700Schasinglulu 	 */
96*91f16700Schasinglulu 	while (bl_params) {
97*91f16700Schasinglulu 		if (bl_params->image_id == BL32_IMAGE_ID) {
98*91f16700Schasinglulu 			bl32_image_ep_info = *bl_params->ep_info;
99*91f16700Schasinglulu 		}
100*91f16700Schasinglulu 
101*91f16700Schasinglulu 		if (bl_params->image_id == BL33_IMAGE_ID) {
102*91f16700Schasinglulu 			bl33_image_ep_info = *bl_params->ep_info;
103*91f16700Schasinglulu 		}
104*91f16700Schasinglulu 
105*91f16700Schasinglulu 		bl_params = bl_params->next_params_info;
106*91f16700Schasinglulu 	}
107*91f16700Schasinglulu 
108*91f16700Schasinglulu 	if (bl33_image_ep_info.pc == 0) {
109*91f16700Schasinglulu 		panic();
110*91f16700Schasinglulu 	}
111*91f16700Schasinglulu 
112*91f16700Schasinglulu #if RPI3_DIRECT_LINUX_BOOT
113*91f16700Schasinglulu # if RPI3_BL33_IN_AARCH32
114*91f16700Schasinglulu 	/*
115*91f16700Schasinglulu 	 * According to the file ``Documentation/arm/Booting`` of the Linux
116*91f16700Schasinglulu 	 * kernel tree, Linux expects:
117*91f16700Schasinglulu 	 * r0 = 0
118*91f16700Schasinglulu 	 * r1 = machine type number, optional in DT-only platforms (~0 if so)
119*91f16700Schasinglulu 	 * r2 = Physical address of the device tree blob
120*91f16700Schasinglulu 	 */
121*91f16700Schasinglulu 	VERBOSE("rpi3: Preparing to boot 32-bit Linux kernel\n");
122*91f16700Schasinglulu 	bl33_image_ep_info.args.arg0 = 0U;
123*91f16700Schasinglulu 	bl33_image_ep_info.args.arg1 = ~0U;
124*91f16700Schasinglulu 	bl33_image_ep_info.args.arg2 = (u_register_t) RPI3_PRELOADED_DTB_BASE;
125*91f16700Schasinglulu # else
126*91f16700Schasinglulu 	/*
127*91f16700Schasinglulu 	 * According to the file ``Documentation/arm64/booting.txt`` of the
128*91f16700Schasinglulu 	 * Linux kernel tree, Linux expects the physical address of the device
129*91f16700Schasinglulu 	 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
130*91f16700Schasinglulu 	 * must be 0.
131*91f16700Schasinglulu 	 */
132*91f16700Schasinglulu 	VERBOSE("rpi3: Preparing to boot 64-bit Linux kernel\n");
133*91f16700Schasinglulu 	bl33_image_ep_info.args.arg0 = (u_register_t) RPI3_PRELOADED_DTB_BASE;
134*91f16700Schasinglulu 	bl33_image_ep_info.args.arg1 = 0ULL;
135*91f16700Schasinglulu 	bl33_image_ep_info.args.arg2 = 0ULL;
136*91f16700Schasinglulu 	bl33_image_ep_info.args.arg3 = 0ULL;
137*91f16700Schasinglulu # endif /* RPI3_BL33_IN_AARCH32 */
138*91f16700Schasinglulu #endif /* RPI3_DIRECT_LINUX_BOOT */
139*91f16700Schasinglulu }
140*91f16700Schasinglulu 
141*91f16700Schasinglulu void bl31_plat_arch_setup(void)
142*91f16700Schasinglulu {
143*91f16700Schasinglulu 	rpi3_setup_page_tables(BL31_BASE, BL31_END - BL31_BASE,
144*91f16700Schasinglulu 			       BL_CODE_BASE, BL_CODE_END,
145*91f16700Schasinglulu 			       BL_RO_DATA_BASE, BL_RO_DATA_END
146*91f16700Schasinglulu #if USE_COHERENT_MEM
147*91f16700Schasinglulu 			       , BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END
148*91f16700Schasinglulu #endif
149*91f16700Schasinglulu 			      );
150*91f16700Schasinglulu 
151*91f16700Schasinglulu 	enable_mmu_el3(0);
152*91f16700Schasinglulu }
153*91f16700Schasinglulu 
154*91f16700Schasinglulu #ifdef RPI3_PRELOADED_DTB_BASE
155*91f16700Schasinglulu /*
156*91f16700Schasinglulu  * Add information to the device tree (if any) about the reserved DRAM used by
157*91f16700Schasinglulu  * the Trusted Firmware.
158*91f16700Schasinglulu  */
159*91f16700Schasinglulu static void rpi3_dtb_add_mem_rsv(void)
160*91f16700Schasinglulu {
161*91f16700Schasinglulu 	int i, regions, rc;
162*91f16700Schasinglulu 	uint64_t addr, size;
163*91f16700Schasinglulu 	void *dtb = (void *)RPI3_PRELOADED_DTB_BASE;
164*91f16700Schasinglulu 
165*91f16700Schasinglulu 	INFO("rpi3: Checking DTB...\n");
166*91f16700Schasinglulu 
167*91f16700Schasinglulu 	/* Return if no device tree is detected */
168*91f16700Schasinglulu 	if (fdt_check_header(dtb) != 0)
169*91f16700Schasinglulu 		return;
170*91f16700Schasinglulu 
171*91f16700Schasinglulu 	regions = fdt_num_mem_rsv(dtb);
172*91f16700Schasinglulu 
173*91f16700Schasinglulu 	VERBOSE("rpi3: Found %d mem reserve region(s)\n", regions);
174*91f16700Schasinglulu 
175*91f16700Schasinglulu 	/* We expect to find one reserved region that we can modify */
176*91f16700Schasinglulu 	if (regions < 1)
177*91f16700Schasinglulu 		return;
178*91f16700Schasinglulu 
179*91f16700Schasinglulu 	/*
180*91f16700Schasinglulu 	 * Look for the region that corresponds to the default boot firmware. It
181*91f16700Schasinglulu 	 * starts at address 0, and it is not needed when the default firmware
182*91f16700Schasinglulu 	 * is replaced by this port of the Trusted Firmware.
183*91f16700Schasinglulu 	 */
184*91f16700Schasinglulu 	for (i = 0; i < regions; i++) {
185*91f16700Schasinglulu 		if (fdt_get_mem_rsv(dtb, i, &addr, &size) != 0)
186*91f16700Schasinglulu 			continue;
187*91f16700Schasinglulu 
188*91f16700Schasinglulu 		if (addr != 0x0)
189*91f16700Schasinglulu 			continue;
190*91f16700Schasinglulu 
191*91f16700Schasinglulu 		VERBOSE("rpi3: Firmware mem reserve region found\n");
192*91f16700Schasinglulu 
193*91f16700Schasinglulu 		rc = fdt_del_mem_rsv(dtb, i);
194*91f16700Schasinglulu 		if (rc != 0) {
195*91f16700Schasinglulu 			INFO("rpi3: Can't remove mem reserve region (%d)\n", rc);
196*91f16700Schasinglulu 		}
197*91f16700Schasinglulu 
198*91f16700Schasinglulu 		break;
199*91f16700Schasinglulu 	}
200*91f16700Schasinglulu 
201*91f16700Schasinglulu 	if (i == regions) {
202*91f16700Schasinglulu 		VERBOSE("rpi3: Firmware mem reserve region not found\n");
203*91f16700Schasinglulu 	}
204*91f16700Schasinglulu 
205*91f16700Schasinglulu 	/*
206*91f16700Schasinglulu 	 * Reserve all SRAM. As said in the documentation, this isn't actually
207*91f16700Schasinglulu 	 * secure memory, so it is needed to tell BL33 that this is a reserved
208*91f16700Schasinglulu 	 * memory region. It doesn't guarantee it won't use it, though.
209*91f16700Schasinglulu 	 */
210*91f16700Schasinglulu 	rc = fdt_add_mem_rsv(dtb, SEC_SRAM_BASE, SEC_SRAM_SIZE);
211*91f16700Schasinglulu 	if (rc != 0) {
212*91f16700Schasinglulu 		WARN("rpi3: Can't add mem reserve region (%d)\n", rc);
213*91f16700Schasinglulu 	}
214*91f16700Schasinglulu 
215*91f16700Schasinglulu 	INFO("rpi3: Reserved 0x%llx - 0x%llx in DTB\n", SEC_SRAM_BASE,
216*91f16700Schasinglulu 	     SEC_SRAM_BASE + SEC_SRAM_SIZE);
217*91f16700Schasinglulu }
218*91f16700Schasinglulu #endif
219*91f16700Schasinglulu 
220*91f16700Schasinglulu void bl31_platform_setup(void)
221*91f16700Schasinglulu {
222*91f16700Schasinglulu #ifdef RPI3_PRELOADED_DTB_BASE
223*91f16700Schasinglulu 	/* Only modify a DTB if we know where to look for it */
224*91f16700Schasinglulu 	rpi3_dtb_add_mem_rsv();
225*91f16700Schasinglulu #endif
226*91f16700Schasinglulu }
227