1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef M0_PARAM_H 8*91f16700Schasinglulu #define M0_PARAM_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #define PARAM_ADDR 0xc0 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define PARAM_M0_FUNC 0x00 13*91f16700Schasinglulu #define PARAM_DRAM_FREQ 0x04 14*91f16700Schasinglulu #define PARAM_DPLL_CON0 0x08 15*91f16700Schasinglulu #define PARAM_DPLL_CON1 0x0c 16*91f16700Schasinglulu #define PARAM_DPLL_CON2 0x10 17*91f16700Schasinglulu #define PARAM_DPLL_CON3 0x14 18*91f16700Schasinglulu #define PARAM_DPLL_CON4 0x18 19*91f16700Schasinglulu #define PARAM_DPLL_CON5 0x1c 20*91f16700Schasinglulu #define PARAM_FREQ_SELECT 0x20 21*91f16700Schasinglulu #define PARAM_M0_DONE 0x24 22*91f16700Schasinglulu #define PARAM_M0_SIZE 0x28 23*91f16700Schasinglulu #define M0_DONE_FLAG 0xf59ec39a 24*91f16700Schasinglulu 25*91f16700Schasinglulu #endif /* M0_PARAM_H */ 26