1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef SUSPEND_H 8*91f16700Schasinglulu #define SUSPEND_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <stdint.h> 11*91f16700Schasinglulu #include <dram.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu #define KHz (1000) 14*91f16700Schasinglulu #define MHz (1000 * KHz) 15*91f16700Schasinglulu #define GHz (1000 * MHz) 16*91f16700Schasinglulu 17*91f16700Schasinglulu #define PI_CA_TRAINING (1 << 0) 18*91f16700Schasinglulu #define PI_WRITE_LEVELING (1 << 1) 19*91f16700Schasinglulu #define PI_READ_GATE_TRAINING (1 << 2) 20*91f16700Schasinglulu #define PI_READ_LEVELING (1 << 3) 21*91f16700Schasinglulu #define PI_WDQ_LEVELING (1 << 4) 22*91f16700Schasinglulu #define PI_FULL_TRAINING (0xff) 23*91f16700Schasinglulu 24*91f16700Schasinglulu void dmc_suspend(void); 25*91f16700Schasinglulu __pmusramfunc void dmc_resume(void); 26*91f16700Schasinglulu extern __pmusramdata uint8_t pmu_enable_watchdog0; 27*91f16700Schasinglulu 28*91f16700Schasinglulu #endif /* SUSPEND_H */ 29