1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef BL32_PARAM_H 8*91f16700Schasinglulu #define BL32_PARAM_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu /******************************************************************************* 11*91f16700Schasinglulu * Platform memory map related constants 12*91f16700Schasinglulu ******************************************************************************/ 13*91f16700Schasinglulu /* TF text, ro, rw, Size: 1MB */ 14*91f16700Schasinglulu #define TZRAM_BASE (0x0) 15*91f16700Schasinglulu #define TZRAM_SIZE (0x100000) 16*91f16700Schasinglulu 17*91f16700Schasinglulu /******************************************************************************* 18*91f16700Schasinglulu * BL32 specific defines. 19*91f16700Schasinglulu ******************************************************************************/ 20*91f16700Schasinglulu /* 21*91f16700Schasinglulu * Put BL32 at the top of the Trusted RAM 22*91f16700Schasinglulu */ 23*91f16700Schasinglulu #define BL32_BASE (TZRAM_BASE + 0x40000) 24*91f16700Schasinglulu #define BL32_LIMIT (TZRAM_BASE + TZRAM_SIZE) 25*91f16700Schasinglulu 26*91f16700Schasinglulu #endif /* BL32_PARAM_H */ 27