1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <common/bl_common.h> 10*91f16700Schasinglulu #include <common/interrupt_props.h> 11*91f16700Schasinglulu #include <drivers/arm/gicv2.h> 12*91f16700Schasinglulu #include <lib/utils.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu /****************************************************************************** 15*91f16700Schasinglulu * The following functions are defined as weak to allow a platform to override 16*91f16700Schasinglulu * the way the GICv2 driver is initialised and used. 17*91f16700Schasinglulu *****************************************************************************/ 18*91f16700Schasinglulu #pragma weak plat_rockchip_gic_driver_init 19*91f16700Schasinglulu #pragma weak plat_rockchip_gic_init 20*91f16700Schasinglulu #pragma weak plat_rockchip_gic_cpuif_enable 21*91f16700Schasinglulu #pragma weak plat_rockchip_gic_cpuif_disable 22*91f16700Schasinglulu #pragma weak plat_rockchip_gic_pcpu_init 23*91f16700Schasinglulu 24*91f16700Schasinglulu /****************************************************************************** 25*91f16700Schasinglulu * List of interrupts. 26*91f16700Schasinglulu *****************************************************************************/ 27*91f16700Schasinglulu static const interrupt_prop_t g0_interrupt_props[] = { 28*91f16700Schasinglulu PLAT_RK_GICV2_G0_IRQS 29*91f16700Schasinglulu }; 30*91f16700Schasinglulu 31*91f16700Schasinglulu /* 32*91f16700Schasinglulu * Ideally `rockchip_gic_data` structure definition should be a `const` but it 33*91f16700Schasinglulu * is kept as modifiable for overwriting with different GICD and GICC base when 34*91f16700Schasinglulu * running on FVP with VE memory map. 35*91f16700Schasinglulu */ 36*91f16700Schasinglulu gicv2_driver_data_t rockchip_gic_data = { 37*91f16700Schasinglulu .gicd_base = PLAT_RK_GICD_BASE, 38*91f16700Schasinglulu .gicc_base = PLAT_RK_GICC_BASE, 39*91f16700Schasinglulu .interrupt_props = g0_interrupt_props, 40*91f16700Schasinglulu .interrupt_props_num = ARRAY_SIZE(g0_interrupt_props), 41*91f16700Schasinglulu }; 42*91f16700Schasinglulu 43*91f16700Schasinglulu /****************************************************************************** 44*91f16700Schasinglulu * RockChip common helper to initialize the GICv2 only driver. 45*91f16700Schasinglulu *****************************************************************************/ 46*91f16700Schasinglulu void plat_rockchip_gic_driver_init(void) 47*91f16700Schasinglulu { 48*91f16700Schasinglulu gicv2_driver_init(&rockchip_gic_data); 49*91f16700Schasinglulu } 50*91f16700Schasinglulu 51*91f16700Schasinglulu void plat_rockchip_gic_init(void) 52*91f16700Schasinglulu { 53*91f16700Schasinglulu gicv2_distif_init(); 54*91f16700Schasinglulu gicv2_pcpu_distif_init(); 55*91f16700Schasinglulu gicv2_cpuif_enable(); 56*91f16700Schasinglulu } 57*91f16700Schasinglulu 58*91f16700Schasinglulu /****************************************************************************** 59*91f16700Schasinglulu * RockChip common helper to enable the GICv2 CPU interface 60*91f16700Schasinglulu *****************************************************************************/ 61*91f16700Schasinglulu void plat_rockchip_gic_cpuif_enable(void) 62*91f16700Schasinglulu { 63*91f16700Schasinglulu gicv2_cpuif_enable(); 64*91f16700Schasinglulu } 65*91f16700Schasinglulu 66*91f16700Schasinglulu /****************************************************************************** 67*91f16700Schasinglulu * RockChip common helper to disable the GICv2 CPU interface 68*91f16700Schasinglulu *****************************************************************************/ 69*91f16700Schasinglulu void plat_rockchip_gic_cpuif_disable(void) 70*91f16700Schasinglulu { 71*91f16700Schasinglulu gicv2_cpuif_disable(); 72*91f16700Schasinglulu } 73*91f16700Schasinglulu 74*91f16700Schasinglulu /****************************************************************************** 75*91f16700Schasinglulu * RockChip common helper to initialize the per cpu distributor interface 76*91f16700Schasinglulu * in GICv2 77*91f16700Schasinglulu *****************************************************************************/ 78*91f16700Schasinglulu void plat_rockchip_gic_pcpu_init(void) 79*91f16700Schasinglulu { 80*91f16700Schasinglulu gicv2_pcpu_distif_init(); 81*91f16700Schasinglulu } 82