1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <arch.h> 8*91f16700Schasinglulu#include <asm_macros.S> 9*91f16700Schasinglulu#include <platform_def.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu .globl pmu_cpuson_entrypoint 12*91f16700Schasinglulu .macro pmusram_entry_func _name 13*91f16700Schasinglulu .section .pmusram.entry, "ax" 14*91f16700Schasinglulu .type \_name, %function 15*91f16700Schasinglulu .cfi_startproc 16*91f16700Schasinglulu \_name: 17*91f16700Schasinglulu .endm 18*91f16700Schasinglulu 19*91f16700Schasinglulupmusram_entry_func pmu_cpuson_entrypoint 20*91f16700Schasinglulu 21*91f16700Schasinglulu#if PSRAM_CHECK_WAKEUP_CPU 22*91f16700Schasinglulucheck_wake_cpus: 23*91f16700Schasinglulu mrs x0, MPIDR_EL1 24*91f16700Schasinglulu and x1, x0, #MPIDR_CPU_MASK 25*91f16700Schasinglulu and x0, x0, #MPIDR_CLUSTER_MASK 26*91f16700Schasinglulu orr x0, x0, x1 27*91f16700Schasinglulu 28*91f16700Schasinglulu /* primary_cpu */ 29*91f16700Schasinglulu ldr w1, boot_mpidr 30*91f16700Schasinglulu cmp w0, w1 31*91f16700Schasinglulu b.eq sys_wakeup 32*91f16700Schasinglulu 33*91f16700Schasinglulu /* 34*91f16700Schasinglulu * If the core is not the primary cpu, 35*91f16700Schasinglulu * force the core into wfe. 36*91f16700Schasinglulu */ 37*91f16700Schasingluluwfe_loop: 38*91f16700Schasinglulu wfe 39*91f16700Schasinglulu b wfe_loop 40*91f16700Schasinglulusys_wakeup: 41*91f16700Schasinglulu#endif 42*91f16700Schasinglulu 43*91f16700Schasinglulu#if PSRAM_DO_DDR_RESUME 44*91f16700Schasingluluddr_resume: 45*91f16700Schasinglulu ldr x2, =__bl31_sram_stack_end 46*91f16700Schasinglulu mov sp, x2 47*91f16700Schasinglulu bl dmc_resume 48*91f16700Schasinglulu#endif 49*91f16700Schasinglulu bl sram_restore 50*91f16700Schasinglulusys_resume: 51*91f16700Schasinglulu bl bl31_warm_entrypoint 52*91f16700Schasingluluendfunc pmu_cpuson_entrypoint 53