1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <platform_def.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include <common/debug.h> 10*91f16700Schasinglulu #include <lib/psci/psci.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu static const unsigned char rcar_power_domain_tree_desc[] = { 13*91f16700Schasinglulu 1, 14*91f16700Schasinglulu PLATFORM_CLUSTER_COUNT, 15*91f16700Schasinglulu PLATFORM_CLUSTER0_CORE_COUNT, 16*91f16700Schasinglulu PLATFORM_CLUSTER1_CORE_COUNT 17*91f16700Schasinglulu }; 18*91f16700Schasinglulu 19*91f16700Schasinglulu const unsigned char *plat_get_power_domain_tree_desc(void) 20*91f16700Schasinglulu { 21*91f16700Schasinglulu return rcar_power_domain_tree_desc; 22*91f16700Schasinglulu } 23*91f16700Schasinglulu 24*91f16700Schasinglulu int plat_core_pos_by_mpidr(u_register_t mpidr) 25*91f16700Schasinglulu { 26*91f16700Schasinglulu unsigned int cluster_id, cpu_id; 27*91f16700Schasinglulu 28*91f16700Schasinglulu mpidr &= MPIDR_AFFINITY_MASK; 29*91f16700Schasinglulu 30*91f16700Schasinglulu if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) 31*91f16700Schasinglulu return -1; 32*91f16700Schasinglulu 33*91f16700Schasinglulu cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 34*91f16700Schasinglulu cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 35*91f16700Schasinglulu 36*91f16700Schasinglulu if (cluster_id >= PLATFORM_CLUSTER_COUNT) 37*91f16700Schasinglulu return -1; 38*91f16700Schasinglulu 39*91f16700Schasinglulu if (cluster_id == 0 && cpu_id >= PLATFORM_CLUSTER0_CORE_COUNT) 40*91f16700Schasinglulu return -1; 41*91f16700Schasinglulu 42*91f16700Schasinglulu if (cluster_id == 1 && cpu_id >= PLATFORM_CLUSTER1_CORE_COUNT) 43*91f16700Schasinglulu return -1; 44*91f16700Schasinglulu 45*91f16700Schasinglulu return (cpu_id + cluster_id * PLATFORM_CLUSTER0_CORE_COUNT); 46*91f16700Schasinglulu } 47*91f16700Schasinglulu 48