xref: /arm-trusted-firmware/plat/renesas/common/include/plat_macros.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
3*91f16700Schasinglulu *
4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu */
6*91f16700Schasinglulu
7*91f16700Schasinglulu#include <drivers/arm/cci.h>
8*91f16700Schasinglulu#include <drivers/arm/gic_common.h>
9*91f16700Schasinglulu#include <drivers/arm/gicv2.h>
10*91f16700Schasinglulu
11*91f16700Schasinglulu#include "rcar_def.h"
12*91f16700Schasinglulu
13*91f16700Schasinglulu.section .rodata.gic_reg_name, "aS"
14*91f16700Schasinglulugicc_regs:
15*91f16700Schasinglulu	.asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
16*91f16700Schasinglulugicd_pend_reg:
17*91f16700Schasinglulu	.asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n"
18*91f16700Schasinglulunewline:
19*91f16700Schasinglulu	.asciz "\n"
20*91f16700Schasingluluspacer:
21*91f16700Schasinglulu	.asciz ":\t\t0x"
22*91f16700Schasinglulu
23*91f16700Schasinglulu	/* ---------------------------------------------
24*91f16700Schasinglulu	 * The below macro prints out relevant GIC
25*91f16700Schasinglulu	 * registers whenever an unhandled exception is
26*91f16700Schasinglulu	 * taken in BL3-1.
27*91f16700Schasinglulu	 * Clobbers: x0 - x10, x16, x17, sp
28*91f16700Schasinglulu	 * ---------------------------------------------
29*91f16700Schasinglulu	 */
30*91f16700Schasinglulu	.macro plat_print_gic_regs
31*91f16700Schasinglulu	mov_imm	x17, RCAR_GICC_BASE
32*91f16700Schasinglulu	mov_imm	x16, RCAR_GICD_BASE
33*91f16700Schasingluluprint_gicc_regs:
34*91f16700Schasinglulu	/* gicc base address is now in x17 */
35*91f16700Schasinglulu	adr	x6, gicc_regs	/* Load the gicc reg list to x6 */
36*91f16700Schasinglulu	/* Load the gicc regs to gp regs used by str_in_crash_buf_print */
37*91f16700Schasinglulu	ldr	w8, [x17, #GICC_HPPIR]
38*91f16700Schasinglulu	ldr	w9, [x17, #GICC_AHPPIR]
39*91f16700Schasinglulu	ldr	w10, [x17, #GICC_CTLR]
40*91f16700Schasinglulu	/* Store to the crash buf and print to console */
41*91f16700Schasinglulu	bl	str_in_crash_buf_print
42*91f16700Schasinglulu
43*91f16700Schasinglulu	/* Print the GICD_ISPENDR regs */
44*91f16700Schasinglulu	add	x7, x16, #GICD_ISPENDR
45*91f16700Schasinglulu	adr	x4, gicd_pend_reg
46*91f16700Schasinglulu	bl	asm_print_str
47*91f16700Schasinglulugicd_ispendr_loop:
48*91f16700Schasinglulu	sub	x4, x7, x16
49*91f16700Schasinglulu	cmp	x4, #0x280
50*91f16700Schasinglulu	b.eq	exit_print_gic_regs
51*91f16700Schasinglulu	bl	asm_print_hex
52*91f16700Schasinglulu	adr	x4, spacer
53*91f16700Schasinglulu	bl	asm_print_str
54*91f16700Schasinglulu	ldr	x4, [x7], #8
55*91f16700Schasinglulu	bl	asm_print_hex
56*91f16700Schasinglulu	adr	x4, newline
57*91f16700Schasinglulu	bl	asm_print_str
58*91f16700Schasinglulu	b	gicd_ispendr_loop
59*91f16700Schasingluluexit_print_gic_regs:
60*91f16700Schasinglulu	.endm
61*91f16700Schasinglulu
62*91f16700Schasinglulu.section .rodata.cci_reg_name, "aS"
63*91f16700Schasinglulucci_iface_regs:
64*91f16700Schasinglulu	.asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
65*91f16700Schasinglulu
66*91f16700Schasinglulu	/* ------------------------------------------------
67*91f16700Schasinglulu	 * The below macro prints out relevant interconnect
68*91f16700Schasinglulu	 * registers whenever an unhandled exception is
69*91f16700Schasinglulu	 * taken in BL3-1.
70*91f16700Schasinglulu	 * Clobbers: x0 - x9, sp
71*91f16700Schasinglulu	 * ------------------------------------------------
72*91f16700Schasinglulu	 */
73*91f16700Schasinglulu	.macro plat_print_interconnect_regs
74*91f16700Schasinglulu	adr	x6, cci_iface_regs
75*91f16700Schasinglulu	/* Store in x7 the base address of the first interface */
76*91f16700Schasinglulu	mov_imm	x7, (CCI500_BASE + SLAVE_IFACE3_OFFSET)
77*91f16700Schasinglulu	ldr	w8, [x7, #SNOOP_CTRL_REG]
78*91f16700Schasinglulu	/* Store in x7 the base address of the second interface */
79*91f16700Schasinglulu	mov_imm	x7, (CCI500_BASE + SLAVE_IFACE4_OFFSET)
80*91f16700Schasinglulu	ldr	w9, [x7, #SNOOP_CTRL_REG]
81*91f16700Schasinglulu	/* Store to the crash buf and print to console */
82*91f16700Schasinglulu	bl	str_in_crash_buf_print
83*91f16700Schasinglulu	.endm
84*91f16700Schasinglulu
85*91f16700Schasinglulu	.macro plat_crash_print_regs
86*91f16700Schasinglulu	plat_print_gic_regs
87*91f16700Schasinglulu	plat_print_interconnect_regs
88*91f16700Schasinglulu	.endm
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