1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu#ifndef RCAR_PLAT_LD_S 7*91f16700Schasinglulu#define RCAR_PLAT_LD_S 8*91f16700Schasinglulu 9*91f16700Schasinglulu#include <lib/xlat_tables/xlat_tables_defs.h> 10*91f16700Schasinglulu#include <platform_def.h> 11*91f16700Schasinglulu 12*91f16700SchasingluluMEMORY { 13*91f16700Schasinglulu SRAM (rwx): ORIGIN = BL31_SRAM_BASE, LENGTH = DEVICE_SRAM_SIZE 14*91f16700Schasinglulu PRAM (r): ORIGIN = BL31_LIMIT - DEVICE_SRAM_SIZE, LENGTH = DEVICE_SRAM_SIZE 15*91f16700Schasinglulu} 16*91f16700Schasinglulu 17*91f16700SchasingluluSECTIONS 18*91f16700Schasinglulu{ 19*91f16700Schasinglulu /* SRAM_COPY is in PRAM */ 20*91f16700Schasinglulu . = BL31_LIMIT - DEVICE_SRAM_SIZE; 21*91f16700Schasinglulu __SRAM_COPY_START__ = .; 22*91f16700Schasinglulu 23*91f16700Schasinglulu .system_ram : { 24*91f16700Schasinglulu /* system ram start is in SRAM */ 25*91f16700Schasinglulu __system_ram_start__ = .; 26*91f16700Schasinglulu *(.system_ram*) 27*91f16700Schasinglulu *iic_dvfs.o(.rodata) 28*91f16700Schasinglulu __system_ram_end__ = .; 29*91f16700Schasinglulu } >SRAM AT>PRAM 30*91f16700Schasinglulu 31*91f16700Schasinglulu ASSERT(__BL31_END__ <= BL31_LIMIT - DEVICE_SRAM_SIZE, 32*91f16700Schasinglulu "BL31 image too large - writing on top of SRAM!") 33*91f16700Schasinglulu 34*91f16700Schasinglulu} 35*91f16700Schasinglulu 36*91f16700Schasinglulu#endif /* RCAR_PLAT_LD_S */ 37