xref: /arm-trusted-firmware/plat/qti/qtiseclib/inc/qtiseclib_interface.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef QTISECLIB_INTERFACE_H
8*91f16700Schasinglulu #define QTISECLIB_INTERFACE_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <stdbool.h>
11*91f16700Schasinglulu #include <stdint.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu #include <qtiseclib_defs.h>
14*91f16700Schasinglulu 
15*91f16700Schasinglulu typedef struct memprot_ipa_info_s {
16*91f16700Schasinglulu 	uint64_t mem_addr;
17*91f16700Schasinglulu 	uint64_t mem_size;
18*91f16700Schasinglulu } memprot_info_t;
19*91f16700Schasinglulu 
20*91f16700Schasinglulu typedef struct memprot_dst_vm_perm_info_s {
21*91f16700Schasinglulu 	uint32_t dst_vm;
22*91f16700Schasinglulu 	uint32_t dst_vm_perm;
23*91f16700Schasinglulu 	uint64_t ctx;
24*91f16700Schasinglulu 	uint32_t ctx_size;
25*91f16700Schasinglulu } memprot_dst_vm_perm_info_t;
26*91f16700Schasinglulu 
27*91f16700Schasinglulu /*
28*91f16700Schasinglulu  * QTISECLIB Published API's.
29*91f16700Schasinglulu  */
30*91f16700Schasinglulu 
31*91f16700Schasinglulu /*
32*91f16700Schasinglulu  * Assembly API's
33*91f16700Schasinglulu  */
34*91f16700Schasinglulu 
35*91f16700Schasinglulu /*
36*91f16700Schasinglulu  * CPUSS common reset handler for all CPU wake up (both cold & warm boot).
37*91f16700Schasinglulu  * Executes on all core. This API assume serialization across CPU
38*91f16700Schasinglulu  * already taken care before invoking.
39*91f16700Schasinglulu  *
40*91f16700Schasinglulu  * Clobbers: x0 - x17, x30
41*91f16700Schasinglulu  */
42*91f16700Schasinglulu void qtiseclib_cpuss_reset_asm(uint32_t bl31_cold_boot_state);
43*91f16700Schasinglulu 
44*91f16700Schasinglulu /*
45*91f16700Schasinglulu  * Execute CPU (Kryo4 gold) specific reset handler / system initialization.
46*91f16700Schasinglulu  * This takes care of executing required CPU errata's.
47*91f16700Schasinglulu  *
48*91f16700Schasinglulu  * Clobbers: x0 - x16
49*91f16700Schasinglulu  */
50*91f16700Schasinglulu void qtiseclib_kryo4_gold_reset_asm(void);
51*91f16700Schasinglulu 
52*91f16700Schasinglulu /*
53*91f16700Schasinglulu  * Execute CPU (Kryo46 gold) specific reset handler / system initialization.
54*91f16700Schasinglulu  * This takes care of executing required CPU errata's.
55*91f16700Schasinglulu  *
56*91f16700Schasinglulu  * Clobbers: x0 - x16
57*91f16700Schasinglulu  */
58*91f16700Schasinglulu void qtiseclib_kryo6_gold_reset_asm(void);
59*91f16700Schasinglulu 
60*91f16700Schasinglulu /*
61*91f16700Schasinglulu  * Execute CPU (Kryo4 silver) specific reset handler / system initialization.
62*91f16700Schasinglulu  * This takes care of executing required CPU errata's.
63*91f16700Schasinglulu  *
64*91f16700Schasinglulu  * Clobbers: x0 - x16
65*91f16700Schasinglulu  */
66*91f16700Schasinglulu void qtiseclib_kryo4_silver_reset_asm(void);
67*91f16700Schasinglulu 
68*91f16700Schasinglulu /*
69*91f16700Schasinglulu  * Execute CPU (Kryo6 silver) specific reset handler / system initialization.
70*91f16700Schasinglulu  * This takes care of executing required CPU errata's.
71*91f16700Schasinglulu  *
72*91f16700Schasinglulu  * Clobbers: x0 - x16
73*91f16700Schasinglulu  */
74*91f16700Schasinglulu void qtiseclib_kryo6_silver_reset_asm(void);
75*91f16700Schasinglulu 
76*91f16700Schasinglulu /*
77*91f16700Schasinglulu  * C Api's
78*91f16700Schasinglulu  */
79*91f16700Schasinglulu void qtiseclib_bl31_platform_setup(void);
80*91f16700Schasinglulu void qtiseclib_invoke_isr(uint32_t irq, void *handle);
81*91f16700Schasinglulu void qtiseclib_panic(void);
82*91f16700Schasinglulu 
83*91f16700Schasinglulu int qtiseclib_mem_assign(const memprot_info_t *mem_info,
84*91f16700Schasinglulu 			 uint32_t mem_info_list_cnt,
85*91f16700Schasinglulu 			 const uint32_t *source_vm_list,
86*91f16700Schasinglulu 			 uint32_t src_vm_list_cnt,
87*91f16700Schasinglulu 			 const memprot_dst_vm_perm_info_t *dest_vm_list,
88*91f16700Schasinglulu 			 uint32_t dst_vm_list_cnt);
89*91f16700Schasinglulu 
90*91f16700Schasinglulu int qtiseclib_psci_init(uintptr_t warmboot_entry);
91*91f16700Schasinglulu int qtiseclib_psci_node_power_on(u_register_t mpidr);
92*91f16700Schasinglulu void qtiseclib_psci_node_on_finish(const uint8_t *states);
93*91f16700Schasinglulu void qtiseclib_psci_cpu_standby(uint8_t pwr_state);
94*91f16700Schasinglulu void qtiseclib_psci_node_power_off(const uint8_t *states);
95*91f16700Schasinglulu void qtiseclib_psci_node_suspend(const uint8_t *states);
96*91f16700Schasinglulu void qtiseclib_psci_node_suspend_finish(const uint8_t *states);
97*91f16700Schasinglulu void qtiseclib_disable_cluster_coherency(uint8_t state);
98*91f16700Schasinglulu 
99*91f16700Schasinglulu #endif /* QTISECLIB_INTERFACE_H */
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