1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net> 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <arch.h> 8*91f16700Schasinglulu#include <asm_macros.S> 9*91f16700Schasinglulu#include <platform_def.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu#include <msm8916_mmap.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu#if PLATFORM_CORE_COUNT > 1 14*91f16700Schasinglulu#define APCS_TCM_START_ADDR 0x10 15*91f16700Schasinglulu#else 16*91f16700Schasinglulu#define APCS_TCM_START_ADDR 0x34 17*91f16700Schasinglulu#endif 18*91f16700Schasinglulu#define APCS_TCM_REDIRECT_EN_0 BIT_32(0) 19*91f16700Schasinglulu 20*91f16700Schasinglulu .globl plat_crash_console_init 21*91f16700Schasinglulu .globl plat_crash_console_putc 22*91f16700Schasinglulu .globl plat_crash_console_flush 23*91f16700Schasinglulu .globl plat_panic_handler 24*91f16700Schasinglulu .globl plat_my_core_pos 25*91f16700Schasinglulu .globl plat_get_my_entrypoint 26*91f16700Schasinglulu .globl plat_reset_handler 27*91f16700Schasinglulu .globl platform_mem_init 28*91f16700Schasinglulu .globl msm8916_entry_point 29*91f16700Schasinglulu 30*91f16700Schasinglulu /* ------------------------------------------------- 31*91f16700Schasinglulu * int plat_crash_console_init(void) 32*91f16700Schasinglulu * Initialize the crash console. 33*91f16700Schasinglulu * Out: r0 - 1 on success, 0 on error 34*91f16700Schasinglulu * Clobber list : r0 - r4 35*91f16700Schasinglulu * ------------------------------------------------- 36*91f16700Schasinglulu */ 37*91f16700Schasinglulufunc plat_crash_console_init 38*91f16700Schasinglulu ldr r1, =BLSP_UART_BASE 39*91f16700Schasinglulu mov r0, #1 40*91f16700Schasinglulu b console_uartdm_core_init 41*91f16700Schasingluluendfunc plat_crash_console_init 42*91f16700Schasinglulu 43*91f16700Schasinglulu /* ------------------------------------------------- 44*91f16700Schasinglulu * int plat_crash_console_putc(int c) 45*91f16700Schasinglulu * Print a character on the crash console. 46*91f16700Schasinglulu * In : r0 - character to be printed 47*91f16700Schasinglulu * Out: r0 - printed character on success 48*91f16700Schasinglulu * Clobber list : r1, r2 49*91f16700Schasinglulu * ------------------------------------------------- 50*91f16700Schasinglulu */ 51*91f16700Schasinglulufunc plat_crash_console_putc 52*91f16700Schasinglulu ldr r1, =BLSP_UART_BASE 53*91f16700Schasinglulu b console_uartdm_core_putc 54*91f16700Schasingluluendfunc plat_crash_console_putc 55*91f16700Schasinglulu 56*91f16700Schasinglulu /* ------------------------------------------------- 57*91f16700Schasinglulu * void plat_crash_console_flush(void) 58*91f16700Schasinglulu * Force a write of all buffered data that has not 59*91f16700Schasinglulu * been output. 60*91f16700Schasinglulu * Clobber list : r1, r2 61*91f16700Schasinglulu * ------------------------------------------------- 62*91f16700Schasinglulu */ 63*91f16700Schasinglulufunc plat_crash_console_flush 64*91f16700Schasinglulu ldr r1, =BLSP_UART_BASE 65*91f16700Schasinglulu b console_uartdm_core_flush 66*91f16700Schasingluluendfunc plat_crash_console_flush 67*91f16700Schasinglulu 68*91f16700Schasinglulu /* ------------------------------------------------- 69*91f16700Schasinglulu * void plat_panic_handler(void) __dead 70*91f16700Schasinglulu * Called when an unrecoverable error occurs. 71*91f16700Schasinglulu * ------------------------------------------------- 72*91f16700Schasinglulu */ 73*91f16700Schasinglulufunc plat_panic_handler 74*91f16700Schasinglulu /* Try to shutdown/reset */ 75*91f16700Schasinglulu ldr r0, =MPM_PS_HOLD 76*91f16700Schasinglulu mov r1, #0 77*91f16700Schasinglulu str r1, [r0] 78*91f16700Schasinglulu1: b 1b 79*91f16700Schasingluluendfunc plat_panic_handler 80*91f16700Schasinglulu 81*91f16700Schasinglulu /* ------------------------------------------------- 82*91f16700Schasinglulu * unsigned int plat_my_core_pos(void) 83*91f16700Schasinglulu * Out: r0 - index of the calling CPU 84*91f16700Schasinglulu * ------------------------------------------------- 85*91f16700Schasinglulu */ 86*91f16700Schasinglulufunc plat_my_core_pos 87*91f16700Schasinglulu .if PLATFORM_CORE_COUNT > 1 88*91f16700Schasinglulu ldcopr r1, MPIDR 89*91f16700Schasinglulu and r0, r1, #MPIDR_CPU_MASK 90*91f16700Schasinglulu .if PLATFORM_CLUSTER_COUNT > 1 91*91f16700Schasinglulu and r1, r1, #MPIDR_CLUSTER_MASK 92*91f16700Schasinglulu orr r0, r0, r1, LSR #(MPIDR_AFFINITY_BITS - \ 93*91f16700Schasinglulu PLATFORM_CPU_PER_CLUSTER_SHIFT) 94*91f16700Schasinglulu .endif 95*91f16700Schasinglulu .else 96*91f16700Schasinglulu /* There is just a single core so always 0 */ 97*91f16700Schasinglulu mov r0, #0 98*91f16700Schasinglulu .endif 99*91f16700Schasinglulu bx lr 100*91f16700Schasingluluendfunc plat_my_core_pos 101*91f16700Schasinglulu 102*91f16700Schasinglulu /* ------------------------------------------------- 103*91f16700Schasinglulu * uintptr_t plat_get_my_entrypoint(void) 104*91f16700Schasinglulu * Distinguish cold and warm boot and return warm boot 105*91f16700Schasinglulu * entry address if available. 106*91f16700Schasinglulu * Out: r0 - warm boot entry point or 0 on cold boot 107*91f16700Schasinglulu * ------------------------------------------------- 108*91f16700Schasinglulu */ 109*91f16700Schasinglulufunc plat_get_my_entrypoint 110*91f16700Schasinglulu ldr r0, =msm8916_entry_point 111*91f16700Schasinglulu ldr r0, [r0] 112*91f16700Schasinglulu cmp r0, #0 113*91f16700Schasinglulu bxne lr 114*91f16700Schasinglulu 115*91f16700Schasinglulu /* 116*91f16700Schasinglulu * Cold boot: Disable TCM redirect to L2 cache as early as 117*91f16700Schasinglulu * possible to avoid crashes when making use of the cache. 118*91f16700Schasinglulu */ 119*91f16700Schasinglulu ldr r1, =APCS_CFG(0) 120*91f16700Schasinglulu ldr r2, [r1, #APCS_TCM_START_ADDR] 121*91f16700Schasinglulu and r2, r2, #~APCS_TCM_REDIRECT_EN_0 122*91f16700Schasinglulu str r2, [r1, #APCS_TCM_START_ADDR] 123*91f16700Schasinglulu bx lr 124*91f16700Schasingluluendfunc plat_get_my_entrypoint 125*91f16700Schasinglulu 126*91f16700Schasinglulu /* ------------------------------------------------- 127*91f16700Schasinglulu * void platform_mem_init(void) 128*91f16700Schasinglulu * Performs additional memory initialization early 129*91f16700Schasinglulu * in the boot process. 130*91f16700Schasinglulu * ------------------------------------------------- 131*91f16700Schasinglulu */ 132*91f16700Schasinglulufunc platform_mem_init 133*91f16700Schasinglulu /* Nothing to do here, all memory is already initialized */ 134*91f16700Schasinglulu bx lr 135*91f16700Schasingluluendfunc platform_mem_init 136*91f16700Schasinglulu 137*91f16700Schasinglulu .data 138*91f16700Schasinglulu .align 3 139*91f16700Schasinglulu 140*91f16700Schasinglulu /* ------------------------------------------------- 141*91f16700Schasinglulu * Warm boot entry point for CPU. Set by PSCI code. 142*91f16700Schasinglulu * ------------------------------------------------- 143*91f16700Schasinglulu */ 144*91f16700Schasinglulumsm8916_entry_point: 145*91f16700Schasinglulu .word 0 146