xref: /arm-trusted-firmware/plat/qti/common/src/aarch64/qti_uart_console.S (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu/*
2*91f16700Schasinglulu * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu * Copyright (c) 2018,2020 The Linux Foundation. All rights reserved.
4*91f16700Schasinglulu *
5*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause
6*91f16700Schasinglulu */
7*91f16700Schasinglulu
8*91f16700Schasinglulu#include <asm_macros.S>
9*91f16700Schasinglulu#include <console_macros.S>
10*91f16700Schasinglulu
11*91f16700Schasinglulu#include <platform_def.h>
12*91f16700Schasinglulu#include <qti_uart_console.h>
13*91f16700Schasinglulu
14*91f16700Schasinglulu/*
15*91f16700Schasinglulu * This driver implements console logging into a ring buffer.
16*91f16700Schasinglulu */
17*91f16700Schasinglulu
18*91f16700Schasinglulu	.globl qti_console_uart_register
19*91f16700Schasinglulu
20*91f16700Schasinglulu	/* -----------------------------------------------
21*91f16700Schasinglulu	 * int qti_console_uart_register(console_t *console,
22*91f16700Schasinglulu	 *				 uintptr_t uart_base_addr)
23*91f16700Schasinglulu	 * Registers uart console instance.
24*91f16700Schasinglulu	 * In:  x0 - pointer to empty console_t struct
25*91f16700Schasinglulu	 *      x1 - start address of uart block.
26*91f16700Schasinglulu	 * Out: x0 - 1 to indicate success
27*91f16700Schasinglulu	 * Clobber list: x0, x1, x14
28*91f16700Schasinglulu	 * -----------------------------------------------
29*91f16700Schasinglulu	 */
30*91f16700Schasinglulufunc qti_console_uart_register
31*91f16700Schasinglulu	str	x1, [x0, #CONSOLE_T_BASE]	/* Save UART base. */
32*91f16700Schasinglulu	finish_console_register uart putc=1, flush=1
33*91f16700Schasingluluendfunc qti_console_uart_register
34*91f16700Schasinglulu
35*91f16700Schasinglulu	/* -----------------------------------------------
36*91f16700Schasinglulu	 * int qti_console_uart_puts(int c, console_t *console)
37*91f16700Schasinglulu	 * Writes a character to the UART console.
38*91f16700Schasinglulu	 * The character must be preserved in x0.
39*91f16700Schasinglulu	 * In: x0 - character to be stored
40*91f16700Schasinglulu	 *     x1 - pointer to console_t struct
41*91f16700Schasinglulu	 * Clobber list: x1, x2
42*91f16700Schasinglulu	 * -----------------------------------------------
43*91f16700Schasinglulu	 */
44*91f16700Schasinglulufunc console_uart_putc
45*91f16700Schasinglulu	/* set x1 = UART base. */
46*91f16700Schasinglulu	ldr	x1, [x1, #CONSOLE_T_BASE]
47*91f16700Schasinglulu
48*91f16700Schasinglulu	/* Loop until M_GENI_CMD_ACTIVE bit not clear. */
49*91f16700Schasinglulu1:	ldr	w2, [x1, #GENI_STATUS_REG]
50*91f16700Schasinglulu	and	w2, w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
51*91f16700Schasinglulu	cmp	w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
52*91f16700Schasinglulu	b.eq	1b
53*91f16700Schasinglulu
54*91f16700Schasinglulu	/* Transmit data. */
55*91f16700Schasinglulu	cmp	w0, #0xA
56*91f16700Schasinglulu	b.ne	3f
57*91f16700Schasinglulu
58*91f16700Schasinglulu	/* Add '\r' when input char is '\n' */
59*91f16700Schasinglulu	mov	w2, #0x1
60*91f16700Schasinglulu	mov	w0, #0xD
61*91f16700Schasinglulu	str	w2, [x1, #UART_TX_TRANS_LEN_REG]
62*91f16700Schasinglulu	mov	w2, #GENI_M_CMD_TX
63*91f16700Schasinglulu	str	w2, [x1, #GENI_M_CMD0_REG]
64*91f16700Schasinglulu	str	w0, [x1, #GENI_TX_FIFOn_REG]
65*91f16700Schasinglulu	mov	w0, #0xA
66*91f16700Schasinglulu
67*91f16700Schasinglulu	/* Loop until M_GENI_CMD_ACTIVE bit not clear. */
68*91f16700Schasinglulu2:	ldr	w2, [x1, #GENI_STATUS_REG]
69*91f16700Schasinglulu	and	w2, w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
70*91f16700Schasinglulu	cmp	w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
71*91f16700Schasinglulu	b.eq	2b
72*91f16700Schasinglulu
73*91f16700Schasinglulu	/* Transmit i/p data. */
74*91f16700Schasinglulu3:	mov	w2, #0x1
75*91f16700Schasinglulu	str	w2, [x1, #UART_TX_TRANS_LEN_REG]
76*91f16700Schasinglulu	mov	w2, #GENI_M_CMD_TX
77*91f16700Schasinglulu	str	w2, [x1, #GENI_M_CMD0_REG]
78*91f16700Schasinglulu	str	w0, [x1, #GENI_TX_FIFOn_REG]
79*91f16700Schasinglulu
80*91f16700Schasinglulu	ret
81*91f16700Schasingluluendfunc	console_uart_putc
82*91f16700Schasinglulu
83*91f16700Schasinglulu	/* -----------------------------------------------
84*91f16700Schasinglulu	 * int qti_console_uart_flush(console_t *console)
85*91f16700Schasinglulu	 * In:  x0 - pointer to console_t struct
86*91f16700Schasinglulu	 * Out: x0 - 0 for success
87*91f16700Schasinglulu	 * Clobber list: x0, x1
88*91f16700Schasinglulu	 * -----------------------------------------------
89*91f16700Schasinglulu	 */
90*91f16700Schasinglulufunc console_uart_flush
91*91f16700Schasinglulu	/* set x0 = UART base. */
92*91f16700Schasinglulu	ldr	x0, [x0, #CONSOLE_T_BASE]
93*91f16700Schasinglulu
94*91f16700Schasinglulu	/* Loop until M_GENI_CMD_ACTIVE bit not clear. */
95*91f16700Schasinglulu1:	ldr	w1, [x0, #GENI_STATUS_REG]
96*91f16700Schasinglulu	and	w1, w1, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
97*91f16700Schasinglulu	cmp	w1, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
98*91f16700Schasinglulu	b.eq	1b
99*91f16700Schasinglulu
100*91f16700Schasinglulu	mov	w0, #0
101*91f16700Schasinglulu	ret
102*91f16700Schasingluluendfunc console_uart_flush
103