1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <plat/common/platform.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu extern char qemu_rotpk_hash[], qemu_rotpk_hash_end[]; 10*91f16700Schasinglulu 11*91f16700Schasinglulu int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len, 12*91f16700Schasinglulu unsigned int *flags) 13*91f16700Schasinglulu { 14*91f16700Schasinglulu *key_ptr = qemu_rotpk_hash; 15*91f16700Schasinglulu *key_len = qemu_rotpk_hash_end - qemu_rotpk_hash; 16*91f16700Schasinglulu *flags = ROTPK_IS_HASH; 17*91f16700Schasinglulu 18*91f16700Schasinglulu return 0; 19*91f16700Schasinglulu } 20*91f16700Schasinglulu 21*91f16700Schasinglulu int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) 22*91f16700Schasinglulu { 23*91f16700Schasinglulu *nv_ctr = 0; 24*91f16700Schasinglulu 25*91f16700Schasinglulu return 0; 26*91f16700Schasinglulu } 27*91f16700Schasinglulu 28*91f16700Schasinglulu int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) 29*91f16700Schasinglulu { 30*91f16700Schasinglulu return 1; 31*91f16700Schasinglulu } 32