1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright 2018-2020 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu#include <arch.h> 9*91f16700Schasinglulu#include <asm_macros.S> 10*91f16700Schasinglulu 11*91f16700Schasinglulu#include <platform_def.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu.globl plat_secondary_cold_boot_setup 14*91f16700Schasinglulu.globl plat_is_my_cpu_primary 15*91f16700Schasinglulu.globl plat_reset_handler 16*91f16700Schasinglulu.globl platform_mem_init 17*91f16700Schasinglulu 18*91f16700Schasinglulu 19*91f16700Schasinglulufunc platform_mem1_init 20*91f16700Schasinglulu ret 21*91f16700Schasingluluendfunc platform_mem1_init 22*91f16700Schasinglulu 23*91f16700Schasinglulu 24*91f16700Schasinglulufunc platform_mem_init 25*91f16700Schasinglulu ret 26*91f16700Schasingluluendfunc platform_mem_init 27*91f16700Schasinglulu 28*91f16700Schasinglulu 29*91f16700Schasinglulufunc apply_platform_errata 30*91f16700Schasinglulu 31*91f16700Schasinglulu ret 32*91f16700Schasingluluendfunc apply_platform_errata 33*91f16700Schasinglulu 34*91f16700Schasinglulu 35*91f16700Schasinglulufunc plat_reset_handler 36*91f16700Schasinglulu mov x29, x30 37*91f16700Schasinglulu bl apply_platform_errata 38*91f16700Schasinglulu 39*91f16700Schasinglulu#if defined(IMAGE_BL31) 40*91f16700Schasinglulu ldr x0, =POLICY_SMMU_PAGESZ_64K 41*91f16700Schasinglulu cbz x0, 1f 42*91f16700Schasinglulu /* Set the SMMU page size in the sACR register */ 43*91f16700Schasinglulu bl _set_smmu_pagesz_64 44*91f16700Schasinglulu#endif 45*91f16700Schasinglulu1: 46*91f16700Schasinglulu mov x30, x29 47*91f16700Schasinglulu 48*91f16700Schasinglulu ret 49*91f16700Schasingluluendfunc plat_reset_handler 50*91f16700Schasinglulu 51*91f16700Schasinglulu 52*91f16700Schasinglulu/* void plat_secondary_cold_boot_setup (void); 53*91f16700Schasinglulu * 54*91f16700Schasinglulu * This function performs any platform specific actions 55*91f16700Schasinglulu * needed for a secondary cpu after a cold reset e.g 56*91f16700Schasinglulu * mark the cpu's presence, mechanism to place it in a 57*91f16700Schasinglulu * holding pen etc. 58*91f16700Schasinglulu */ 59*91f16700Schasinglulufunc plat_secondary_cold_boot_setup 60*91f16700Schasinglulu /* lx2160a does not do cold boot for secondary CPU */ 61*91f16700Schasinglulucb_panic: 62*91f16700Schasinglulu b cb_panic 63*91f16700Schasingluluendfunc plat_secondary_cold_boot_setup 64*91f16700Schasinglulu 65*91f16700Schasinglulu 66*91f16700Schasinglulu/* unsigned int plat_is_my_cpu_primary (void); 67*91f16700Schasinglulu * 68*91f16700Schasinglulu * Find out whether the current cpu is the primary 69*91f16700Schasinglulu * cpu. 70*91f16700Schasinglulu */ 71*91f16700Schasinglulufunc plat_is_my_cpu_primary 72*91f16700Schasinglulu mrs x0, mpidr_el1 73*91f16700Schasinglulu and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 74*91f16700Schasinglulu cmp x0, 0x0 75*91f16700Schasinglulu cset w0, eq 76*91f16700Schasinglulu ret 77*91f16700Schasingluluendfunc plat_is_my_cpu_primary 78