1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright 2022 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <arch.h> 8*91f16700Schasinglulu#include <asm_macros.S> 9*91f16700Schasinglulu#include <platform_def.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu .globl plat_secondary_cold_boot_setup 12*91f16700Schasinglulu .globl plat_is_my_cpu_primary 13*91f16700Schasinglulu .globl plat_reset_handler 14*91f16700Schasinglulu .globl platform_mem_init 15*91f16700Schasinglulu 16*91f16700Schasinglulufunc platform_mem1_init 17*91f16700Schasinglulu ret 18*91f16700Schasingluluendfunc platform_mem1_init 19*91f16700Schasinglulu 20*91f16700Schasinglulufunc platform_mem_init 21*91f16700Schasinglulu ret 22*91f16700Schasingluluendfunc platform_mem_init 23*91f16700Schasinglulu 24*91f16700Schasinglulufunc apply_platform_errata 25*91f16700Schasinglulu ret 26*91f16700Schasingluluendfunc apply_platform_errata 27*91f16700Schasinglulu 28*91f16700Schasinglulufunc plat_reset_handler 29*91f16700Schasinglulu mov x29, x30 30*91f16700Schasinglulu bl apply_platform_errata 31*91f16700Schasinglulu 32*91f16700Schasinglulu#if defined(IMAGE_BL31) 33*91f16700Schasinglulu ldr x0, =POLICY_SMMU_PAGESZ_64K 34*91f16700Schasinglulu cbz x0, 1f 35*91f16700Schasinglulu /* Set the SMMU page size in the sACR register */ 36*91f16700Schasinglulu bl _set_smmu_pagesz_64 37*91f16700Schasinglulu#endif 38*91f16700Schasinglulu1: 39*91f16700Schasinglulu mov x30, x29 40*91f16700Schasinglulu ret 41*91f16700Schasingluluendfunc plat_reset_handler 42*91f16700Schasinglulu 43*91f16700Schasinglulu /* 44*91f16700Schasinglulu * void plat_secondary_cold_boot_setup (void); 45*91f16700Schasinglulu * 46*91f16700Schasinglulu * This function performs any platform specific actions 47*91f16700Schasinglulu * needed for a secondary cpu after a cold reset e.g 48*91f16700Schasinglulu * mark the cpu's presence, mechanism to place it in a 49*91f16700Schasinglulu * holding pen etc. 50*91f16700Schasinglulu */ 51*91f16700Schasinglulufunc plat_secondary_cold_boot_setup 52*91f16700Schasinglulu /* ls1088a does not do cold boot for secondary CPU */ 53*91f16700Schasinglulucb_panic: 54*91f16700Schasinglulu b cb_panic 55*91f16700Schasingluluendfunc plat_secondary_cold_boot_setup 56*91f16700Schasinglulu 57*91f16700Schasinglulu /* 58*91f16700Schasinglulu * unsigned int plat_is_my_cpu_primary (void); 59*91f16700Schasinglulu * 60*91f16700Schasinglulu * Find out whether the current cpu is the primary 61*91f16700Schasinglulu * cpu. 62*91f16700Schasinglulu */ 63*91f16700Schasinglulufunc plat_is_my_cpu_primary 64*91f16700Schasinglulu mrs x0, mpidr_el1 65*91f16700Schasinglulu and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 66*91f16700Schasinglulu cmp x0, 0x0 67*91f16700Schasinglulu cset w0, eq 68*91f16700Schasinglulu ret 69*91f16700Schasingluluendfunc plat_is_my_cpu_primary 70