1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright 2018-2021 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <arch.h> 8*91f16700Schasinglulu#include <asm_macros.S> 9*91f16700Schasinglulu 10*91f16700Schasinglulu#include <platform_def.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu .globl plat_secondary_cold_boot_setup 13*91f16700Schasinglulu .globl plat_is_my_cpu_primary 14*91f16700Schasinglulu .globl plat_reset_handler 15*91f16700Schasinglulu .globl platform_mem_init 16*91f16700Schasinglulu 17*91f16700Schasinglulufunc platform_mem1_init 18*91f16700Schasinglulu ret 19*91f16700Schasingluluendfunc platform_mem1_init 20*91f16700Schasinglulu 21*91f16700Schasinglulufunc platform_mem_init 22*91f16700Schasinglulu ret 23*91f16700Schasingluluendfunc platform_mem_init 24*91f16700Schasinglulu 25*91f16700Schasinglulufunc apply_platform_errata 26*91f16700Schasinglulu ret 27*91f16700Schasingluluendfunc apply_platform_errata 28*91f16700Schasinglulu 29*91f16700Schasinglulufunc plat_reset_handler 30*91f16700Schasinglulu mov x29, x30 31*91f16700Schasinglulu bl apply_platform_errata 32*91f16700Schasinglulu 33*91f16700Schasinglulu#if defined(IMAGE_BL31) 34*91f16700Schasinglulu ldr x0, =POLICY_SMMU_PAGESZ_64K 35*91f16700Schasinglulu cbz x0, 1f 36*91f16700Schasinglulu /* Set the SMMU page size in the sACR register */ 37*91f16700Schasinglulu bl _set_smmu_pagesz_64 38*91f16700Schasinglulu#endif 39*91f16700Schasinglulu1: 40*91f16700Schasinglulu mov x30, x29 41*91f16700Schasinglulu ret 42*91f16700Schasingluluendfunc plat_reset_handler 43*91f16700Schasinglulu 44*91f16700Schasinglulu/* 45*91f16700Schasinglulu * void plat_secondary_cold_boot_setup (void); 46*91f16700Schasinglulu * 47*91f16700Schasinglulu * This function performs any platform specific actions 48*91f16700Schasinglulu * needed for a secondary cpu after a cold reset e.g 49*91f16700Schasinglulu * mark the cpu's presence, mechanism to place it in a 50*91f16700Schasinglulu * holding pen etc. 51*91f16700Schasinglulu */ 52*91f16700Schasinglulufunc plat_secondary_cold_boot_setup 53*91f16700Schasinglulu /* ls1043a does not do cold boot for secondary CPU */ 54*91f16700Schasinglulucb_panic: 55*91f16700Schasinglulu b cb_panic 56*91f16700Schasingluluendfunc plat_secondary_cold_boot_setup 57*91f16700Schasinglulu 58*91f16700Schasinglulu/* 59*91f16700Schasinglulu * unsigned int plat_is_my_cpu_primary (void); 60*91f16700Schasinglulu * 61*91f16700Schasinglulu * Find out whether the current cpu is the primary 62*91f16700Schasinglulu * cpu. 63*91f16700Schasinglulu */ 64*91f16700Schasinglulufunc plat_is_my_cpu_primary 65*91f16700Schasinglulu mrs x0, mpidr_el1 66*91f16700Schasinglulu and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 67*91f16700Schasinglulu cmp x0, 0x0 68*91f16700Schasinglulu cset w0, eq 69*91f16700Schasinglulu ret 70*91f16700Schasingluluendfunc plat_is_my_cpu_primary 71