xref: /arm-trusted-firmware/plat/nxp/common/setup/include/ls_interrupt_mgmt.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright 2020 NXP
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  *
6*91f16700Schasinglulu  */
7*91f16700Schasinglulu 
8*91f16700Schasinglulu #ifndef LS_EL3_INTRPT_MGMT_H
9*91f16700Schasinglulu #define LS_EL3_INTRPT_MGMT_H
10*91f16700Schasinglulu 
11*91f16700Schasinglulu #include <bl31/interrupt_mgmt.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu #define MAX_INTR_EL3		128
14*91f16700Schasinglulu 
15*91f16700Schasinglulu /*
16*91f16700Schasinglulu  * Register handler to specific GIC entrance
17*91f16700Schasinglulu  * for INTR_TYPE_EL3 type of interrupt
18*91f16700Schasinglulu  */
19*91f16700Schasinglulu int request_intr_type_el3(uint32_t id, interrupt_type_handler_t handler);
20*91f16700Schasinglulu 
21*91f16700Schasinglulu void ls_el3_interrupt_config(void);
22*91f16700Schasinglulu 
23*91f16700Schasinglulu #endif	/*	LS_EL3_INTRPT_MGMT_H	*/
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