1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright 2018-2021 NXP 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu# 7*91f16700Schasinglulu 8*91f16700Schasinglulu############################################################################### 9*91f16700Schasinglulu# Flow begins in BL2 at EL3 mode 10*91f16700SchasingluluRESET_TO_BL2 := 1 11*91f16700Schasinglulu 12*91f16700Schasinglulu# Though one core is powered up by default, there are 13*91f16700Schasinglulu# platform specific ways to release more than one core 14*91f16700SchasingluluCOLD_BOOT_SINGLE_CPU := 0 15*91f16700Schasinglulu 16*91f16700SchasingluluPROGRAMMABLE_RESET_ADDRESS := 1 17*91f16700Schasinglulu 18*91f16700SchasingluluUSE_COHERENT_MEM := 0 19*91f16700Schasinglulu 20*91f16700Schasinglulu# Use generic OID definition (tbbr_oid.h) 21*91f16700SchasingluluUSE_TBBR_DEFS := 1 22*91f16700Schasinglulu 23*91f16700SchasingluluPLAT_XLAT_TABLES_DYNAMIC := 0 24*91f16700Schasinglulu 25*91f16700SchasingluluENABLE_SVE_FOR_NS := 0 26*91f16700Schasinglulu 27*91f16700SchasingluluENABLE_STACK_PROTECTOR := 0 28*91f16700Schasinglulu 29*91f16700SchasingluluERROR_DEPRECATED := 0 30*91f16700Schasinglulu 31*91f16700SchasingluluLS_DISABLE_TRUSTED_WDOG := 1 32*91f16700Schasinglulu 33*91f16700Schasinglulu# On ARM platforms, separate the code and read-only data sections to allow 34*91f16700Schasinglulu# mapping the former as executable and the latter as execute-never. 35*91f16700SchasingluluSEPARATE_CODE_AND_RODATA := 1 36*91f16700Schasinglulu 37*91f16700Schasinglulu# Enable new version of image loading on ARM platforms 38*91f16700SchasingluluLOAD_IMAGE_V2 := 1 39*91f16700Schasinglulu 40*91f16700SchasingluluRCW := "" 41*91f16700Schasinglulu 42*91f16700Schasingluluifneq (${SPD},none) 43*91f16700Schasinglulu$(eval $(call add_define, NXP_LOAD_BL32)) 44*91f16700Schasingluluendif 45*91f16700Schasinglulu 46*91f16700Schasinglulu############################################################################### 47*91f16700Schasinglulu 48*91f16700SchasingluluPLAT_TOOL_PATH := tools/nxp 49*91f16700SchasingluluCREATE_PBL_TOOL_PATH := ${PLAT_TOOL_PATH}/create_pbl 50*91f16700SchasingluluPLAT_SETUP_PATH := ${PLAT_PATH}/common/setup 51*91f16700Schasinglulu 52*91f16700SchasingluluPLAT_INCLUDES += -I${PLAT_SETUP_PATH}/include \ 53*91f16700Schasinglulu -Iinclude/plat/arm/common \ 54*91f16700Schasinglulu -Iinclude/drivers/arm \ 55*91f16700Schasinglulu -Iinclude/lib \ 56*91f16700Schasinglulu -Iinclude/drivers/io \ 57*91f16700Schasinglulu -Ilib/psci 58*91f16700Schasinglulu 59*91f16700Schasinglulu# Required without TBBR. 60*91f16700Schasinglulu# To include the defines for DDR PHY Images. 61*91f16700SchasingluluPLAT_INCLUDES += -Iinclude/common/tbbr 62*91f16700Schasinglulu 63*91f16700Schasingluluinclude ${PLAT_SETUP_PATH}/core.mk 64*91f16700SchasingluluPLAT_BL_COMMON_SOURCES += ${CPU_LIBS} \ 65*91f16700Schasinglulu plat/nxp/common/setup/ls_err.c \ 66*91f16700Schasinglulu plat/nxp/common/setup/ls_common.c 67*91f16700Schasinglulu 68*91f16700Schasingluluifneq (${ENABLE_STACK_PROTECTOR},0) 69*91f16700SchasingluluPLAT_BL_COMMON_SOURCES += ${PLAT_SETUP_PATH}/ls_stack_protector.c 70*91f16700Schasingluluendif 71*91f16700Schasinglulu 72*91f16700Schasingluluinclude lib/xlat_tables_v2/xlat_tables.mk 73*91f16700Schasinglulu 74*91f16700SchasingluluPLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 75*91f16700Schasinglulu 76*91f16700SchasingluluBL2_SOURCES += drivers/io/io_fip.c \ 77*91f16700Schasinglulu drivers/io/io_memmap.c \ 78*91f16700Schasinglulu drivers/io/io_storage.c \ 79*91f16700Schasinglulu common/desc_image_load.c \ 80*91f16700Schasinglulu plat/nxp/common/setup/ls_image_load.c \ 81*91f16700Schasinglulu plat/nxp/common/setup/ls_io_storage.c \ 82*91f16700Schasinglulu plat/nxp/common/setup/ls_bl2_el3_setup.c \ 83*91f16700Schasinglulu plat/nxp/common/setup/${ARCH}/ls_bl2_mem_params_desc.c 84*91f16700Schasinglulu 85*91f16700SchasingluluBL31_SOURCES += plat/nxp/common/setup/ls_bl31_setup.c \ 86*91f16700Schasinglulu 87*91f16700Schasingluluifeq (${LS_EL3_INTERRUPT_HANDLER}, yes) 88*91f16700Schasinglulu$(eval $(call add_define, LS_EL3_INTERRUPT_HANDLER)) 89*91f16700SchasingluluBL31_SOURCES += plat/nxp/common/setup/ls_interrupt_mgmt.c 90*91f16700Schasingluluendif 91*91f16700Schasinglulu 92*91f16700Schasingluluifeq (${TEST_BL31}, 1) 93*91f16700SchasingluluBL31_SOURCES += ${TEST_SOURCES} 94*91f16700Schasingluluendif 95*91f16700Schasinglulu 96*91f16700Schasinglulu# Verify build config 97*91f16700Schasinglulu# ------------------- 98*91f16700Schasinglulu 99*91f16700Schasingluluifneq (${LOAD_IMAGE_V2}, 1) 100*91f16700Schasinglulu $(error Error: Layerscape needs LOAD_IMAGE_V2=1) 101*91f16700Schasingluluelse 102*91f16700Schasinglulu$(eval $(call add_define,LOAD_IMAGE_V2)) 103*91f16700Schasingluluendif 104*91f16700Schasinglulu 105*91f16700Schasingluluinclude $(CREATE_PBL_TOOL_PATH)/create_pbl.mk 106