1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright 2018-2020 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <common/bl_common.h> 9*91f16700Schasinglulu #include <common/desc_image_load.h> 10*91f16700Schasinglulu #ifdef CSF_HEADER_PREPENDED 11*91f16700Schasinglulu #include <csf_hdr.h> 12*91f16700Schasinglulu #endif 13*91f16700Schasinglulu #include <plat/common/platform.h> 14*91f16700Schasinglulu #include <platform_def.h> 15*91f16700Schasinglulu 16*91f16700Schasinglulu /******************************************************************************* 17*91f16700Schasinglulu * Following descriptor provides BL image/ep information that gets used 18*91f16700Schasinglulu * by BL2 to load the images and also subset of this information is 19*91f16700Schasinglulu * passed to next BL image. The image loading sequence is managed by 20*91f16700Schasinglulu * populating the images in required loading order. The image execution 21*91f16700Schasinglulu * sequence is managed by populating the `next_handoff_image_id` with 22*91f16700Schasinglulu * the next executable image id. 23*91f16700Schasinglulu ******************************************************************************/ 24*91f16700Schasinglulu static bl_mem_params_node_t bl2_mem_params_descs[] = { 25*91f16700Schasinglulu /* Fill BL31 related information */ 26*91f16700Schasinglulu { 27*91f16700Schasinglulu .image_id = BL31_IMAGE_ID, 28*91f16700Schasinglulu 29*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 30*91f16700Schasinglulu VERSION_2, entry_point_info_t, 31*91f16700Schasinglulu SECURE | EXECUTABLE | EP_FIRST_EXE), 32*91f16700Schasinglulu .ep_info.pc = BL31_BASE, 33*91f16700Schasinglulu .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, 34*91f16700Schasinglulu DISABLE_ALL_EXCEPTIONS), 35*91f16700Schasinglulu #if DEBUG 36*91f16700Schasinglulu .ep_info.args.arg1 = LS_BL31_PLAT_PARAM_VAL, 37*91f16700Schasinglulu #endif 38*91f16700Schasinglulu 39*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 40*91f16700Schasinglulu VERSION_2, image_info_t, IMAGE_ATTRIB_PLAT_SETUP), 41*91f16700Schasinglulu #ifdef CSF_HEADER_PREPENDED 42*91f16700Schasinglulu .image_info.image_base = BL31_BASE - CSF_HDR_SZ, 43*91f16700Schasinglulu .image_info.image_max_size = (BL31_LIMIT - BL31_BASE) + 44*91f16700Schasinglulu CSF_HDR_SZ, 45*91f16700Schasinglulu #else 46*91f16700Schasinglulu .image_info.image_base = BL31_BASE, 47*91f16700Schasinglulu .image_info.image_max_size = (BL31_LIMIT - BL31_BASE), 48*91f16700Schasinglulu #endif 49*91f16700Schasinglulu 50*91f16700Schasinglulu # ifdef NXP_LOAD_BL32 51*91f16700Schasinglulu .next_handoff_image_id = BL32_IMAGE_ID, 52*91f16700Schasinglulu # else 53*91f16700Schasinglulu .next_handoff_image_id = BL33_IMAGE_ID, 54*91f16700Schasinglulu # endif 55*91f16700Schasinglulu }, 56*91f16700Schasinglulu # ifdef NXP_LOAD_BL32 57*91f16700Schasinglulu /* Fill BL32 related information */ 58*91f16700Schasinglulu { 59*91f16700Schasinglulu .image_id = BL32_IMAGE_ID, 60*91f16700Schasinglulu 61*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 62*91f16700Schasinglulu VERSION_2, entry_point_info_t, SECURE | EXECUTABLE), 63*91f16700Schasinglulu .ep_info.pc = BL32_BASE, 64*91f16700Schasinglulu 65*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 66*91f16700Schasinglulu VERSION_2, image_info_t, 0), 67*91f16700Schasinglulu #ifdef CSF_HEADER_PREPENDED 68*91f16700Schasinglulu .image_info.image_base = BL32_BASE - CSF_HDR_SZ, 69*91f16700Schasinglulu .image_info.image_max_size = (BL32_LIMIT - BL32_BASE) + 70*91f16700Schasinglulu CSF_HDR_SZ, 71*91f16700Schasinglulu #else 72*91f16700Schasinglulu .image_info.image_base = BL32_BASE, 73*91f16700Schasinglulu .image_info.image_max_size = (BL32_LIMIT - BL32_BASE), 74*91f16700Schasinglulu #endif 75*91f16700Schasinglulu .next_handoff_image_id = BL33_IMAGE_ID, 76*91f16700Schasinglulu }, 77*91f16700Schasinglulu # endif /* BL32_BASE */ 78*91f16700Schasinglulu 79*91f16700Schasinglulu /* Fill BL33 related information */ 80*91f16700Schasinglulu { 81*91f16700Schasinglulu .image_id = BL33_IMAGE_ID, 82*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, 83*91f16700Schasinglulu VERSION_2, entry_point_info_t, NON_SECURE | EXECUTABLE), 84*91f16700Schasinglulu .ep_info.pc = BL33_BASE, 85*91f16700Schasinglulu 86*91f16700Schasinglulu SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, 87*91f16700Schasinglulu VERSION_2, image_info_t, 0), 88*91f16700Schasinglulu #ifdef CSF_HEADER_PREPENDED 89*91f16700Schasinglulu .image_info.image_base = BL33_BASE - CSF_HDR_SZ, 90*91f16700Schasinglulu .image_info.image_max_size = (BL33_LIMIT - BL33_BASE) + 91*91f16700Schasinglulu CSF_HDR_SZ, 92*91f16700Schasinglulu #else 93*91f16700Schasinglulu .image_info.image_base = BL33_BASE, 94*91f16700Schasinglulu .image_info.image_max_size = BL33_LIMIT - BL33_BASE, 95*91f16700Schasinglulu #endif 96*91f16700Schasinglulu .ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 97*91f16700Schasinglulu DISABLE_ALL_EXCEPTIONS), 98*91f16700Schasinglulu 99*91f16700Schasinglulu .next_handoff_image_id = INVALID_IMAGE_ID, 100*91f16700Schasinglulu } 101*91f16700Schasinglulu }; 102*91f16700Schasinglulu 103*91f16700Schasinglulu REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs) 104