xref: /arm-trusted-firmware/plat/nxp/common/plat_make_helper/plat_common_def.mk (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu# Copyright 2020-2021 NXP
2*91f16700Schasinglulu#
3*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause
4*91f16700Schasinglulu#
5*91f16700Schasinglulu
6*91f16700Schasinglulu# Include build macros, for example: SET_NXP_MAKE_FLAG
7*91f16700Schasingluluinclude plat/nxp/common/plat_make_helper/plat_build_macros.mk
8*91f16700Schasinglulu
9*91f16700Schasinglulu# Adding platform specific defines
10*91f16700Schasinglulu
11*91f16700Schasinglulu$(eval $(call add_define_val,BOARD,'"${BOARD}"'))
12*91f16700Schasinglulu
13*91f16700Schasingluluifeq (${POVDD_ENABLE},yes)
14*91f16700Schasinglulu$(eval $(call add_define,CONFIG_POVDD_ENABLE))
15*91f16700Schasingluluendif
16*91f16700Schasinglulu
17*91f16700Schasingluluifneq (${FLASH_TYPE},)
18*91f16700Schasinglulu$(eval $(call add_define,CONFIG_${FLASH_TYPE}))
19*91f16700Schasingluluendif
20*91f16700Schasinglulu
21*91f16700Schasingluluifneq (${XSPI_FLASH_SZ},)
22*91f16700Schasinglulu$(eval $(call add_define_val,NXP_FLEXSPI_FLASH_SIZE,${XSPI_FLASH_SZ}))
23*91f16700Schasingluluendif
24*91f16700Schasinglulu
25*91f16700Schasingluluifneq (${QSPI_FLASH_SZ},)
26*91f16700Schasinglulu$(eval $(call add_define_val,NXP_QSPI_FLASH_SIZE,${QSPI_FLASH_SZ}))
27*91f16700Schasingluluendif
28*91f16700Schasinglulu
29*91f16700Schasingluluifneq (${NOR_FLASH_SZ},)
30*91f16700Schasinglulu$(eval $(call add_define_val,NXP_NOR_FLASH_SIZE,${NOR_FLASH_SZ}))
31*91f16700Schasingluluendif
32*91f16700Schasinglulu
33*91f16700Schasinglulu
34*91f16700Schasingluluifneq (${FSPI_ERASE_4K},)
35*91f16700Schasinglulu$(eval $(call add_define_val,CONFIG_FSPI_ERASE_4K,${FSPI_ERASE_4K}))
36*91f16700Schasingluluendif
37*91f16700Schasinglulu
38*91f16700Schasingluluifneq (${NUM_OF_DDRC},)
39*91f16700Schasinglulu$(eval $(call add_define_val,NUM_OF_DDRC,${NUM_OF_DDRC}))
40*91f16700Schasingluluendif
41*91f16700Schasinglulu
42*91f16700Schasingluluifeq (${CONFIG_DDR_NODIMM},1)
43*91f16700Schasinglulu$(eval $(call add_define,CONFIG_DDR_NODIMM))
44*91f16700SchasingluluDDRC_NUM_DIMM := 1
45*91f16700Schasingluluendif
46*91f16700Schasinglulu
47*91f16700Schasingluluifneq (${DDRC_NUM_DIMM},)
48*91f16700Schasinglulu$(eval $(call add_define_val,DDRC_NUM_DIMM,${DDRC_NUM_DIMM}))
49*91f16700Schasingluluendif
50*91f16700Schasinglulu
51*91f16700Schasingluluifneq (${DDRC_NUM_CS},)
52*91f16700Schasinglulu$(eval $(call add_define_val,DDRC_NUM_CS,${DDRC_NUM_CS}))
53*91f16700Schasingluluendif
54*91f16700Schasinglulu
55*91f16700Schasingluluifeq (${DDR_ADDR_DEC},yes)
56*91f16700Schasinglulu$(eval $(call add_define,CONFIG_DDR_ADDR_DEC))
57*91f16700Schasingluluendif
58*91f16700Schasinglulu
59*91f16700Schasingluluifeq (${DDR_ECC_EN},yes)
60*91f16700Schasinglulu$(eval $(call add_define,CONFIG_DDR_ECC_EN))
61*91f16700Schasingluluendif
62*91f16700Schasinglulu
63*91f16700Schasingluluifeq (${CONFIG_STATIC_DDR},1)
64*91f16700Schasinglulu$(eval $(call add_define,CONFIG_STATIC_DDR))
65*91f16700Schasingluluendif
66*91f16700Schasinglulu
67*91f16700Schasinglulu# Platform can control the base address for non-volatile storage.
68*91f16700Schasinglulu#$(eval $(call add_define_val,NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}'))
69*91f16700Schasinglulu
70*91f16700Schasingluluifeq (${WARM_BOOT},yes)
71*91f16700Schasinglulu$(eval $(call add_define_val,PHY_TRAINING_REGS_ON_FLASH,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - ${NXP_XSPI_NOR_UNIT_SIZE}'))
72*91f16700Schasingluluendif
73*91f16700Schasinglulu
74*91f16700Schasinglulu# Selecting Boot Source for the TFA images.
75*91f16700Schasingluludefine add_boot_mode_define
76*91f16700Schasinglulu    ifeq ($(1),qspi)
77*91f16700Schasinglulu        $$(eval $$(call SET_NXP_MAKE_FLAG,QSPI_NEEDED,BL2))
78*91f16700Schasinglulu        $$(eval $$(call add_define,QSPI_BOOT))
79*91f16700Schasinglulu    else ifeq ($(1),sd)
80*91f16700Schasinglulu        $$(eval $$(call SET_NXP_MAKE_FLAG,SD_MMC_NEEDED,BL2))
81*91f16700Schasinglulu        $$(eval $$(call add_define,SD_BOOT))
82*91f16700Schasinglulu    else ifeq ($(1),emmc)
83*91f16700Schasinglulu        $$(eval $$(call SET_NXP_MAKE_FLAG,SD_MMC_NEEDED,BL2))
84*91f16700Schasinglulu        $$(eval $$(call add_define,EMMC_BOOT))
85*91f16700Schasinglulu    else ifeq ($(1),nor)
86*91f16700Schasinglulu        $$(eval $$(call SET_NXP_MAKE_FLAG,IFC_NOR_NEEDED,BL2))
87*91f16700Schasinglulu        $$(eval $$(call add_define,NOR_BOOT))
88*91f16700Schasinglulu    else ifeq ($(1),nand)
89*91f16700Schasinglulu        $$(eval $$(call SET_NXP_MAKE_FLAG,IFC_NAND_NEEDED,BL2))
90*91f16700Schasinglulu        $$(eval $$(call add_define,NAND_BOOT))
91*91f16700Schasinglulu    else ifeq ($(1),flexspi_nor)
92*91f16700Schasinglulu        $$(eval $$(call SET_NXP_MAKE_FLAG,XSPI_NEEDED,BL2))
93*91f16700Schasinglulu        $$(eval $$(call add_define,FLEXSPI_NOR_BOOT))
94*91f16700Schasinglulu    else
95*91f16700Schasinglulu        $$(error $(PLAT) Cannot Support Boot Mode: $(BOOT_MODE))
96*91f16700Schasinglulu    endif
97*91f16700Schasingluluendef
98*91f16700Schasinglulu
99*91f16700Schasingluluifneq (,$(findstring $(BOOT_MODE),$(SUPPORTED_BOOT_MODE)))
100*91f16700Schasinglulu    $(eval $(call add_boot_mode_define,$(strip $(BOOT_MODE))))
101*91f16700Schasingluluelse
102*91f16700Schasinglulu    $(error $(PLAT) Un-supported Boot Mode = $(BOOT_MODE))
103*91f16700Schasingluluendif
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