1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright 2020 NXP 3*91f16700Schasinglulu# 4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu# 6*91f16700Schasinglulu 7*91f16700Schasinglulu# NXP Non-Volatile data flag storage used and then cleared by SW on boot-up 8*91f16700Schasinglulu 9*91f16700Schasinglulu$(eval $(call add_define,NXP_NV_SW_MAINT_LAST_EXEC_DATA)) 10*91f16700Schasinglulu 11*91f16700Schasingluluifeq ($(NXP_COINED_BB),yes) 12*91f16700Schasinglulu$(eval $(call add_define,NXP_COINED_BB)) 13*91f16700Schasinglulu# BL2 : To read the reset cause from LP SECMON GPR register 14*91f16700Schasinglulu# BL31: To write the reset cause to LP SECMON GPR register 15*91f16700Schasinglulu$(eval $(call SET_NXP_MAKE_FLAG,SNVS_NEEDED,BL_COMM)) 16*91f16700Schasinglulu 17*91f16700Schasinglulu# BL2: DDR training data is stored on Flexspi NOR. 18*91f16700Schasingluluifneq (${BOOT_MODE},flexspi_nor) 19*91f16700Schasinglulu$(eval $(call SET_NXP_MAKE_FLAG,XSPI_NEEDED,BL2)) 20*91f16700Schasingluluendif 21*91f16700Schasinglulu 22*91f16700Schasingluluelse 23*91f16700Schasinglulu$(eval $(call add_define_val,DEFAULT_NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}')) 24*91f16700Schasinglulu$(eval $(call SET_NXP_MAKE_FLAG,XSPI_NEEDED,BL_COMM)) 25*91f16700Schasingluluendif 26*91f16700Schasinglulu 27*91f16700SchasingluluNV_STORAGE_INCLUDES += -I${PLAT_COMMON_PATH}/nv_storage 28*91f16700Schasinglulu 29*91f16700SchasingluluNV_STORAGE_SOURCES += ${PLAT_COMMON_PATH}/nv_storage/plat_nv_storage.c 30