1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. 4*91f16700Schasinglulu * 5*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <common/bl_common.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <smmu.h> 11*91f16700Schasinglulu #include <tegra_def.h> 12*91f16700Schasinglulu #include <tegra_mc_def.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu #define MAX_NUM_SMMU_DEVICES U(1) 15*91f16700Schasinglulu 16*91f16700Schasinglulu /******************************************************************************* 17*91f16700Schasinglulu * Handler to return the support SMMU devices number 18*91f16700Schasinglulu ******************************************************************************/ 19*91f16700Schasinglulu uint32_t plat_get_num_smmu_devices(void) 20*91f16700Schasinglulu { 21*91f16700Schasinglulu return MAX_NUM_SMMU_DEVICES; 22*91f16700Schasinglulu } 23