xref: /arm-trusted-firmware/plat/nvidia/tegra/common/tegra_stack_protector.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <stdint.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <arch_helpers.h>
10*91f16700Schasinglulu #include <lib/mmio.h>
11*91f16700Schasinglulu #include <plat/common/platform.h>
12*91f16700Schasinglulu #include <platform_def.h>
13*91f16700Schasinglulu 
14*91f16700Schasinglulu u_register_t plat_get_stack_protector_canary(void)
15*91f16700Schasinglulu {
16*91f16700Schasinglulu 	u_register_t seed;
17*91f16700Schasinglulu 
18*91f16700Schasinglulu 	/*
19*91f16700Schasinglulu 	 * Ideally, a random number should be returned instead. As the
20*91f16700Schasinglulu 	 * platform does not have any random number generator, this is
21*91f16700Schasinglulu 	 * better than nothing, but not really secure.
22*91f16700Schasinglulu 	 */
23*91f16700Schasinglulu 	seed = mmio_read_32(TEGRA_MISC_BASE + HARDWARE_REVISION_OFFSET);
24*91f16700Schasinglulu 	seed <<= 32;
25*91f16700Schasinglulu 	seed |= mmio_read_32(TEGRA_TMRUS_BASE);
26*91f16700Schasinglulu 
27*91f16700Schasinglulu 	return seed ^ read_cntpct_el0();
28*91f16700Schasinglulu }
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